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| — | university:courses:electronics:electronics-lab-9 [23 Aug 2019 13:05] – Antoniu Miclaus |
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| | ====== Activity: Regulated Voltage Reference ====== |
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| | ====== Version 1 ====== |
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| | ===== Objective: ===== |
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| | The zero gain amplifier (Q<sub>1</sub>, R<sub>2</sub>) and stabilized current source (Q<sub>2</sub>, R<sub>3</sub>) from activities 10 and 11 can be used in conjunction with a PNP current mirror stage (Q<sub>3</sub>,Q<sub>4</sub>) in negative feedback to build a circuit which provides a constant or regulated output voltage over a range of input voltages. |
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| | ===== Materials: ===== |
| | ADALM2000 Active Learning Module\\ |
| | Solder-less breadboard\\ |
| | 1 - 2.2KΩ Resistor ( or any similar value )\\ |
| | 1 - 100Ω resistor\\ |
| | 2 - small signal NPN transistors (2N3904 or SSM2212)\\ |
| | 2 - small signal PNP transistors (2N3906 or SSM2220)\\ |
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| | ===== Directions: ===== |
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| | The breadboard connections are as shown in the diagram below. The output of the AWG1 drives the emitters of both PNP transistors Q<sub>3</sub> and Q<sub>4</sub>. Q<sub>3</sub> and Q<sub>4</sub> are wired as a current mirror with their bases connected together with the collector of Q<sub>3</sub>. The collector of Q<sub>4</sub> connects to resistor R<sub>1</sub>. Resistors R<sub>1</sub>, R<sub>2</sub> and transistor Q<sub>1</sub> are connected as in the previous zero gain amplifier section. Since the V<sub>BE</sub> of Q<sub>2</sub> is always smaller than the V<sub>BE</sub> of Q<sub>1</sub>, You should select Q<sub>1</sub> and Q<sub>2</sub> from your inventory of devices such that (at the same collector current) Q<sub>2</sub>'s V<sub>BE</sub> is less than Q<sub>1</sub>'s V<sub>BE</sub>. The base of transistor Q<sub>2</sub> is connected to the zero gain output at the collector of Q<sub>1</sub>. The collector of Q<sub>2</sub> connects to the input side of the PNP current mirror at the base - collector of Q<sub>3</sub>. The 2+ (Single Ended) scope input is used to measure the output voltage at the collector of Q<sub>4</sub>. |
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| | {{ :university:courses:electronics:a9_f1.png?500 |}} |
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| | <WRAP centeralign> Figure 1 Regulator Version 1 </WRAP> |
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| | ===== Hardware Setup: ===== |
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| | {{:university:courses:electronics:regulator_v1-bb.png|}} |
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| | <WRAP centeralign> Figure 2 Regulator Version 1 Breadboard Circuit </WRAP> |
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| | Waveform generator 1 should be configured for a 1 KHz triangle wave with 4 volt amplitude peak-to-peak and 2V offset. The Single ended input of scope channel 2 (2+) is used to measure the stabilized output voltage at the collector of Q<sub>4</sub> ( negative inputs 1= and 2- should be connected to ground). |
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| | ===== Procedure: ===== |
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| | Plot the output voltage (as measured at the collector of Q<sub>4</sub>) vs. the input voltage. At what input voltage level does the output voltage stop changing i.e. regulate? This is called the "drop out" voltage. For input voltages above the drop out voltage, how much does the output voltage change for each volt of change at the input? The change in Vout / change in Vin is called line regulation. Connect a variable resistor from the output node to ground. With the input voltage fixed (i.e. connected to the fixed Vp board power supply), measure the output voltage for various settings of the resistor. Calculate the current in the resistor for each setting. How does the output voltage vary vs. output current? This is called load regulation. |
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| | <WRAP centeralign>{{:university:courses:electronics:regulator_v1-wav.png?500|}}</WRAP> |
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| | <WRAP centeralign> Figure 3 Regulator Version 1 Waveform </WRAP> |
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| | ====== Version 2: ====== |
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| | ===== Objective: ===== |
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| | The problem with the circuit in regulator version 1 is that the current available to an output load is limited by the feedback current supplied from NPN Q<sub>2</sub> mirrored through PNPs Q<sub>3</sub> and Q<sub>4</sub>. It would be desirable to build a circuit which provides a constant or regulated output voltage over not only a range of input voltages but also output load currents. This second circuit utilizes an emitter follower output stage to provide the current to the output. |
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| | ===== Materials: ===== |
| | 1 - 2.2KΩ Resistor\\ |
| | 1 - 100Ω resistor\\ |
| | 1 - 10KΩ variable resistor (potentiometer)\\ |
| | 1 - 4.7KΩ resistor (resistors can any similar value selected for desired circuit operation)\\ |
| | 4 - small signal NPN transistors (2N3904 and SSM2212)\\ |
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| | ===== Directions: ===== |
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| | The breadboard connections are as shown in the diagram below. As before transistor Q<sub>1</sub> and resistors R<sub>1</sub> and R<sub>2</sub> are configured as a zero gain amplifier. Transistor Q<sub>2</sub> and variable resistor R<sub>3</sub>form a stabilized current source. If the SSM2212 matched NPN pair is used it is best that it be used for devices Q<sub>1</sub> and Q<sub>2</sub>. Common emitter stage Q<sub>3</sub> along with its collector load R<sub>4</sub> provide gain. Emitter follower Q<sub>4</sub> drives the output node and closes the negative feedback loop. |
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| | {{ :university:courses:electronics:a9_f2.png?500 |}} |
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| | <WRAP centeralign> Figure 4 Regulator Version 2 </WRAP> |
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| | ===== Hardware Setup: ===== |
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| | {{:university:courses:electronics:regulator_v2-bb.png|}} |
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| | <WRAP centeralign> Figure 5 Regulator Version 2 Breadboard Circuit</WRAP> |
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| | Waveform generator W1 should be configured for a 1 KHz triangle wave with 4 volt amplitude peak-to-peak and 2V offset. Scope channel 2 (2+) is used to measure the stabilized output voltage at the emitter of Q<sub>4</sub>. |
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| | ===== Procedure: ===== |
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| | Repeat the drop out voltage, line and load regulation measurements for this circuit. How are they different than the first regulator circuit? |
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| | <WRAP centeralign>{{:university:courses:electronics:regulator_v2-wav.png?500|}}</WRAP> |
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| | <WRAP centeralign> Figure 6 Regulator Version 2 Waveform </WRAP> |
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| | ==== For Further Study: ==== |
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| | ADI Mini Tutorial on [[http://www.analog.com/static/imported-files/tutorials/MT-087.pdf|Voltage references]] |
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| | ====== Using an NPN transistor array: ====== |
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| | The CA3045,46 ( LM3045, 46 ) NPN transistor array is a good alternate choice for building this example circuit. See pinout below. |
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| | {{ :university:courses:electronics:a9_f3.png?400 |}} |
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| | All the emitters can be tired to ground ( pins 3,7,10,13 ). Devices Q<sub>1</sub>, Q<sub>2</sub> and Q<sub>3</sub> can be connected in parallel and serve as Q<sub>2</sub> in figure 2. Q<sub>4</sub> and Q<sub>5</sub>can be used for Q<sub>1</sub> and Q<sub>3</sub>in figure 2. An individual device such as a 2N3904 etc. can be used for Q<sub>4</sub> in figure 2. The 3 to 1 emitter area ratio will result in an output voltage very nearly 1.2 volts if R<sub>1</sub> and R<sub>3</sub> are both equal to 2KΩ (when R<sub>2</sub> is 100Ω). |
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| | <WRAP round download> |
| | **Resources:** |
| | * Fritzing files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/fritzing/regulated_voltage_reference_bb | regulated_voltage_reference_bb]] |
| | * LTspice files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/ltspice/regulated_voltage_reference_ltspice | regulated_voltage_reference_ltspice]] |
| | </WRAP> |
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| | **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]** |
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