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university:courses:electronics:electronics-lab-7m [28 Oct 2012 19:28] – created Doug Merceruniversity:courses:electronics:electronics-lab-7m [23 Aug 2019 12:53] – Antoniu Miclaus
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-====== Activity 7M. Zero gain amplifier (MOS) ======+====== Activity: Zero gain amplifier (MOS) ======
  
 ===== Objective: ===== ===== Objective: =====
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 ===== Materials :===== ===== Materials :=====
  
-Analog Discovery Lab hardware\\+ADALM2000 Active Learning Module\\
 Solder-less breadboard\\ Solder-less breadboard\\
 1 - 2.2KΩ Resistor (or any similar value)\\ 1 - 2.2KΩ Resistor (or any similar value)\\
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 ===== Hardware Setup: ===== ===== Hardware Setup: =====
  
-The waveform generator 1 should be configured for a 1 KHz triangle wave with 2 volt amplitude and 2V offset. Connect scope Channel 1 to display output W1 of the AWG generator. The Single ended input of scope channel 2 (2+) is used to measure alternately the gate and drain voltage of M<sub>1</sub>.+{{:university:courses:electronics:nmos_zero_gain-bb.png|}} 
 + 
 +<WRAP centeralign> Figure 2 NMOS Zero Gain Amplifier Breadboard Circuit </WRAP> 
 + 
 +The waveform generator 1 should be configured for a 1 KHz triangle wave with 4 volt amplitude peak-to-peak and 2V offset. Connect scope Channel 1 to display output W1 of the AWG generator. The Single ended input of scope channel 2 (2+) is used to measure alternately the gate and drain voltage of M<sub>1</sub>.
  
 ===== Procedure: ===== ===== Procedure: =====
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 In the figure below we have a transistor biased into saturation region with a drain voltage which is less than the gate voltage by , (equal to I<sub>D</sub> times 50 ohms) and is essentially constant with input voltage changes applied from the waveform generator. In the figure below we have a transistor biased into saturation region with a drain voltage which is less than the gate voltage by , (equal to I<sub>D</sub> times 50 ohms) and is essentially constant with input voltage changes applied from the waveform generator.
  
-{{ :university:courses:electronics:a7m_f2.png?500 |}}+<WRAP centeralign>{{:university:courses:electronics:nmos_zero_gain_vds-wav.png?500|}}</WRAP>
  
-<WRAP centeralign> Figure 2 Plot comparing V<sub>gate</sub> and V<sub>drain</sub> </WRAP>+<WRAP centeralign> Figure 3 V<sub>drain</sub> Plot </WRAP> 
 + 
 +<WRAP centeralign>{{:university:courses:electronics:nmos_zero_gain_vgs-wav.png?500|}}</WRAP> 
 + 
 +<WRAP centeralign> Figure 4 V<sub>gate</sub> Plot </WRAP> 
 + 
 +{{ :university:courses:electronics:a7m_f2.png?500 |}}
  
-<WRAP centeralign> Figure 3 V<sub>GS</sub> and V<sub>DS</sub> vs. drain current </WRAP>+<WRAP centeralign> Figure 5 Plot comparing V<sub>gate</sub> and V<sub>drain</sub> </WRAP>
  
 ===== Questions: ===== ===== Questions: =====
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 What are the relative gains of the two paths when the drain current is less than and greater than the "ideal" zero gain value? What are the relative gains of the two paths when the drain current is less than and greater than the "ideal" zero gain value?
  
 +<WRAP round download>
 +**Resources:**
 +  * Fritzing files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/fritzing/mos_zero_gain_amp_bb | mos_zero_gain_amp_bb]]
 +  * LTspice files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/ltspice/mos_zero_gain_amp_ltspice| mos_zero_gain_amp_ltspice]]
 +</WRAP>
  
 +**Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]**
  
  
  
university/courses/electronics/electronics-lab-7m.txt · Last modified: 25 Jun 2020 22:07 by 127.0.0.1

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