The purpose of this activity is to investigate the common source configuration of the MOS transistor.
ADALM2000 Active Learning Module
5 - Resistors
1 - 50 KΩ Variable resistor, potentiometer
1 - small signal NMOS transistor (enhancement mode ZVN2110A or CD4007)
The configuration, shown in figure 1, demonstrates the NMOS transistor used as the common source amplifier. Output load resistor RL is chosen such that, for the desired nominal drain current ID, the voltage appearing at VDS is approximately half way between Vp and Vn (0 volts). Adjustable resistor Rpot a sets the nominal bias operating point for the transistor (VGS) to set the required ID. Voltage divider R1/R2 is chosen to provide a sufficiently large attenuation of the input stimulus from waveform generator W1 such that the amplitude of W1 is approximately the same as the signal amplitude seen at VDS.. This is done to more easily view the waveform generator W1 signal, given the rather small signal that will appear at the gate of the transistor, VGS. The attenuated W1 signal is AC coupled into the gate of the transistor with 4.7 uF C1so as not to disturb the DC bias condition.
Figure 1 Common source amplifier test configuration
The waveform generator W1 should be configured for a 1 KHz Sine wave with 3 volt amplitude peak-to-peak and 0 volt offset. The setup should be configured with scope channel 1+ connected to display the output W1. Scope channel 2 (2+) is used to measure alternately the waveform at the gate and drain of M1.
Figure 2 Common source amplifier test configuration breadboard connection
Figure 3 Common source amplifier test circuit, Scopy plot
The voltage gain, A, of the common source amplifier can be expressed as the ratio of load resistor RL to the small signal source resistance rs. The transconductance, gm, of the transistor is a function of the drain current ID and the so called gate overdrive voltage, VGS-Vth where Vth is the threshold voltage.
The small signal source resistance is 1/gm and can be viewed as being in series with the source. Now with a signal applied to the gate the same current flows in rs and the drain load RL. Thus the gain A is given by RL times gm.
The purpose of this activity is to investigate effect of the addition of source degeneration.
1 - 5KΩ Variable resistor, potentiometer
Disconnect the source of M1 from ground and insert RS, a 5KΩ potentiometer, as shown in the following diagram. Adjust RS while noting the output signal seen at the drain of the transistor.
Figure 4 Source degeneration added
What effect does adding RS have to the DC operating point of the circuit and how much would you need to adjust Rpot to return the circuit to the same DC bias (ID) you had in figure 1?
What is the effect on the voltage gain, A, by increasing RS? Write down the new gain equation similar to equation (2) above.
Source degeneration gain equation:
Adding the source degeneration resistor has improved the stability of the DC operating point at the cost decreased amplifier gain. A higher gain for AC signals can be restored to some extent by adding capacitor C2across the degeneration resistor RS as shown in figure 7.
Figure 7 C2 added to increase AC gain
How does adding negative feedback help to stabilize the DC operating point?
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