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university:courses:electronics:electronics-lab-5 [23 Aug 2019 12:40] Antoniu Miclaus |
university:courses:electronics:electronics-lab-5 [25 Feb 2020 14:42] Pop Andreea Added Scopy plots |
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| ===== Hardware Setup: ===== | ===== Hardware Setup: ===== | ||
| - | {{ :university:courses:electronics:a5_nf1.png?|}} | + | {{:university:courses:electronics:ce_amp_test_config-bb_bb.png?900|}} |
| <WRAP centeralign> Figure 2 Common emitter amplifier test configuration breadboard connection </WRAP> | <WRAP centeralign> Figure 2 Common emitter amplifier test configuration breadboard connection </WRAP> | ||
| The waveform generator output W1 should be configured for a 1 KHz sine wave with 3 volt amplitude peak-to-peak and 0 volt offset. The setup should be configured with scope channel 1+ connected to display the output W1. Scope channel 2 (2+) is used to measure alternately the waveform at the base and collector of Q<sub>1</sub>. | The waveform generator output W1 should be configured for a 1 KHz sine wave with 3 volt amplitude peak-to-peak and 0 volt offset. The setup should be configured with scope channel 1+ connected to display the output W1. Scope channel 2 (2+) is used to measure alternately the waveform at the base and collector of Q<sub>1</sub>. | ||
| + | {{:university:courses:electronics:1vce-gnd.png?900|}} | ||
| + | <WRAP centeralign> Figure 3 Common emitter amplifier test configuration, V<sub>in</sub> and V<sub>BE</sub></WRAP> | ||
| + | {{:university:courses:electronics:1vbe-gnd.png?900|}} | ||
| + | <WRAP centeralign> Figure 4 Common emitter amplifier test configuration, V<sub>in</sub> and V<sub>BE</sub></WRAP> | ||
| ===== Procedure: ===== | ===== Procedure: ===== | ||
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| {{ :university:courses:electronics:a5_f2.png?500 |}} | {{ :university:courses:electronics:a5_f2.png?500 |}} | ||
| - | <WRAP centeralign> Figure 3 Alternate Common emitter amplifier test configuration </WRAP> | + | <WRAP centeralign> Figure 5 Alternate Common emitter amplifier test configuration </WRAP> |
| {{ :university:courses:electronics:a5_nf2.png? |}} | {{ :university:courses:electronics:a5_nf2.png? |}} | ||
| - | <WRAP centeralign> Figure 4 Alternate Common emitter amplifier test configuration breadboard connection </WRAP> | + | <WRAP centeralign> Figure 6 Alternate Common emitter amplifier test configuration breadboard connection </WRAP> |
| - | ====== Self-biased configuration with negative feedback ====== | + | {{:university:courses:electronics:alt_ce_vb.png?900|}} |
| + | <WRAP centeralign> Figure 7 Alternate Common emitter amplifier test configuration, Vin and VBE </WRAP> | ||
| + | {{:university:courses:electronics:alt_ce_vb_zoom.png?900|}} | ||
| + | <WRAP centeralign> Figure 8 Alternate Common emitter amplifier test configuration VBE zoom </WRAP> | ||
| + | ====== Self-biased configuration with negative feedback ====== | ||
| + | ====Objective:===== | ||
| + | The purpose of this section is to investigate effect of adding negative feedback to stabilize the DC operating point. | ||
| {{ :university:courses:electronics:a5_f3.png?500 |}} | {{ :university:courses:electronics:a5_f3.png?500 |}} | ||
| - | <WRAP centeralign> Figure 5 Self Biased configuration </WRAP> | + | <WRAP centeralign> Figure 9 Self Biased configuration </WRAP> |
| {{ :university:courses:electronics:a5_nf3.png? |}} | {{ :university:courses:electronics:a5_nf3.png? |}} | ||
| - | <WRAP centeralign> Figure 6 Self Biased configuration breadboard connection </WRAP> | + | <WRAP centeralign> Figure 10 Self Biased configuration breadboard connection </WRAP> |
| + | {{:university:courses:electronics:self_b_vc.png?900|}} | ||
| + | <WRAP centeralign> Figure 11 Self Biased configuration, V<sub>in</sub> and V<sub>CE</sub> </WRAP> | ||
| + | |||
| + | {{:university:courses:electronics:self_b_vb.png?900|}} | ||
| + | <WRAP centeralign> Figure 12 Self Biased configuration, V<sub>in</sub> and V<sub>BE</sub></WRAP> | ||
| ===== Questions: ===== | ===== Questions: ===== | ||
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| {{ :university:courses:electronics:a5_f4.png?500 |}} | {{ :university:courses:electronics:a5_f4.png?500 |}} | ||
| - | <WRAP centeralign> Figure 7 Emitter degeneration added </WRAP> | + | <WRAP centeralign> Figure 13 Emitter degeneration added </WRAP> |
| {{ :university:courses:electronics:a5_nf4.png? |}} | {{ :university:courses:electronics:a5_nf4.png? |}} | ||
| - | <WRAP centeralign> Figure 8 Emitter degeneration added breadboard connection </WRAP> | + | <WRAP centeralign> Figure 14 Emitter degeneration added breadboard connection </WRAP> |
| + | {{:university:courses:electronics:emit_deg_vc-gnd.png?900|}} | ||
| + | <WRAP centeralign> Figure 15 Emitter degeneration added, V<sub>in</sub> and V<sub>CE</sub></WRAP> | ||
| + | |||
| + | {{:university:courses:electronics:emit_deg_vb-gnd.png?900|}} | ||
| + | <WRAP centeralign> Figure 16 Emitter degeneration added, V<sub>in</sub> and V<sub>BE</sub> </WRAP> | ||
| ===== Questions: ===== | ===== Questions: ===== | ||
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| {{ :university:courses:electronics:a5_f5.png?500 |}} | {{ :university:courses:electronics:a5_f5.png?500 |}} | ||
| - | <WRAP centeralign> Figure 9 C<sub>2</sub> added to increase AC gain </WRAP> | + | <WRAP centeralign> Figure 17 C<sub>2</sub> added to increase AC gain </WRAP> |
| {{ :university:courses:electronics:a5_nf5.png? |}} | {{ :university:courses:electronics:a5_nf5.png? |}} | ||
| - | <WRAP centeralign> Figure 10 C<sub>2</sub> added to increase AC gain </WRAP> | + | <WRAP centeralign> Figure 18 C<sub>2</sub> added to increase AC gain </WRAP> |
| + | |||
| + | {{:university:courses:electronics:inc_gain_vc.png?900|}} | ||
| + | <WRAP centeralign> Figure 19 C<sub>2</sub> added to increase AC gain, V<sub>in</sub> and V<sub>CE</sub> </WRAP> | ||
| + | |||
| + | {{:university:courses:electronics:inc_gain_vb.png?900|}} | ||
| + | <WRAP centeralign> Figure 20 C<sub>2</sub> added to increase AC gain, V<sub>in</sub> and V<sub>BE</sub> </WRAP> | ||
| <WRAP round download> | <WRAP round download> | ||
university/courses/electronics/electronics-lab-5.txt · Last modified: 25 Jun 2020 22:07 (external edit)