The purpose of this activity is to investigate the common emitter configuration of the BJT.
ADALM2000 Active Learning Module
4 - Resistors
1 - 50KΩ Variable resistor, potentiometer
1 - small signal NPN transistor (2N3904)
The configuration, shown in figure 1, demonstrates the NPN transistor used as the common emitter amplifier. Output load resistor RL is chosen such that for the desired nominal collector current IC, approximately one half of the Vp voltage (2.5V) appears at VCE. Adjustable resistor Rpot along with Rb sets the nominal bias operating point for the transistor (IB) to set the required IC. Voltage divider R1/R2 is chosen to provide a sufficiently large attenuation of the input stimulus from waveform generator 1. This is done to more easily view the generator W1 signal, given the rather small signal that will appear at the base of the transistor, VBE. The attenuated waveform generator W1 signal is AC coupled into the base of the transistor by the 4.7 uF capacitor so as not to disturb the DC bias condition.
Figure 1 Common emitter amplifier test configuration
Figure 2 Common emitter amplifier test configuration breadboard connection
The waveform generator output W1 should be configured for a 1 KHz sine wave with 3 volt amplitude peak-to-peak and 0 volt offset. The setup should be configured with scope channel 1+ connected to display the output W1. Scope channel 2 (2+) is used to measure alternately the waveform at the base and collector of Q1.
Figure 3 Common emitter amplifier test configuration, Vin and VBE
Figure 4 Common emitter amplifier test configuration, Vin and VBE
The voltage gain, A, of the common emitter amplifier can be expressed as the ratio of load resistor RL to the small signal emitter resistance re. The transconductance, gm, of the transistor is a function of the collector current IC and the so called thermal voltage, kT/q which can be approximated by around 25 mV or 26 mV at room temperature.
The small signal emitter resistance is 1/gm and can be viewed as being in series with the emitter. Now with a signal applied to the base the same current (neglecting base current) flows in re and the collector load RL. Thus the gain A is given by the ratio of RL to re.
Alternately, the curve tracer circuit from activity 7 can be modified slightly, (might be simplest way since it was already constructed in the earlier section) to produce a common emitter amplifier test circuit shown below. All the attributes are basically the same with two slight advantages. One is the base current bias is no longer dependent on the exponential base voltage (VBE). The second is the summation of the small AC signal from the attenuated AWG 1 output is independent of the base bias circuit and does not need to be AC coupled. The small signal AC input is applied to the non-inverting terminal of the op-amp and thus due to the negative feedback also appears at the base of the transistor (inverting op-amp input).
Figure 5 Alternate Common emitter amplifier test configuration
Figure 6 Alternate Common emitter amplifier test configuration breadboard connection
Figure 7 Alternate Common emitter amplifier test configuration, Vin and VBE
Figure 8 Alternate Common emitter amplifier test configuration VBE zoom
The purpose of this section is to investigate effect of adding negative feedback to stabilize the DC operating point.
Figure 9 Self Biased configuration
Figure 10 Self Biased configuration breadboard connection
Figure 11 Self Biased configuration, Vin and VCE
Figure 12 Self Biased configuration, Vin and VBE
How does adding negative feedback help to stabilize the DC operating point?
The purpose of this activity is to investigate effect of the addition of emitter degeneration.
1 - 5KΩ Variable resistor, potentiometer (500? if one is available)
Disconnect the emitter of Q1 from ground and insert RE, a 5KΩ potentiometer, as shown in the following diagram. Adjust RE while noting the output signal seen at the collector of the transistor.
Figure 13 Emitter degeneration added
Figure 14 Emitter degeneration added breadboard connection
Figure 15 Emitter degeneration added, Vin and VCE
Figure 16 Emitter degeneration added, Vin and VBE
What effect does adding RE have to the DC operating point of the circuit and how much would you need to adjust Rpot to return the circuit to the same DC bias (IC) you had in figure 1?
What is the effect on the voltage gain, A, by increasing RE?
Adding the emitter degeneration resistor has improved the stability of the DC operating point at the cost decreased amplifier gain. A higher gain for AC signals can be restored to some extent by adding capacitor C2across the degeneration resistor RE as shown in figure 9.
Figure 17 C2 added to increase AC gain
Figure 18 C2 added to increase AC gain
Figure 19 C2 added to increase AC gain, Vin and VCE
Figure 20 C2 added to increase AC gain, Vin and VBE
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