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university:courses:electronics:electronics-lab-4m [25 Jun 2020 22:07] – external edit university:courses:electronics:electronics-lab-4m [22 Jul 2020 11:25] – [Procedure:] Figure 3 Replaced Vds with Vgs Pop Andreea
Line 25: Line 25:
  
 <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-bb.png|}}</WRAP> <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-bb.png|}}</WRAP>
-<WRAP centeralign> Figure 2 NMOS I<sub>D</sub> vs V<sub>DS</sub> breadboard circuit </WRAP>+<WRAP centeralign> Figure 2 NMOS I<sub>D</sub> vs V<sub>GS</sub> breadboard circuit </WRAP>
  
 The arbitrary waveform generator should be configured for a 100 Hz triangle wave with 2.5 volt amplitude peak-to-peak and 1.25 volt offset. The differential scope channel 2 (2+/-) measures the current in the resistor (and in the transistor). Scope channel 1 should be connected to display the output of the waveform generator. The current flowing through the transistor is the voltage difference 2+ and 2- divided by the resistor value (100Ω). The arbitrary waveform generator should be configured for a 100 Hz triangle wave with 2.5 volt amplitude peak-to-peak and 1.25 volt offset. The differential scope channel 2 (2+/-) measures the current in the resistor (and in the transistor). Scope channel 1 should be connected to display the output of the waveform generator. The current flowing through the transistor is the voltage difference 2+ and 2- divided by the resistor value (100Ω).
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 <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-xy.png|}}</WRAP> <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-xy.png|}}</WRAP>
-<WRAP centeralign> Figure 3 NMOS I<sub>D</sub> vs V<sub>DS</sub> XY plot </WRAP>+<WRAP centeralign> Figure 3 NMOS I<sub>D</sub> vs V<sub>GS</sub> XY plot </WRAP>
  
 Load the captured data in to Excel and calculate the current. Plot the drain current vs. the gate voltage of the transistor (V<sub>GS</sub>). No drain current should flow when V<sub>GS</sub> is less than V<sub>TH</sub>the threshold voltage of the transistor. The threshold voltage, V<sub>TH</sub>, can be both positive, for an enhancement mode, and negative, for a depletion mode device. When V<sub>GS</sub> is greater than V<sub>TH</sub>, the gate voltage to drain current relationship is quadratic. Now plot the drain current vs. the square of the gate voltage. The line should be straight as seen in the second plot. Load the captured data in to Excel and calculate the current. Plot the drain current vs. the gate voltage of the transistor (V<sub>GS</sub>). No drain current should flow when V<sub>GS</sub> is less than V<sub>TH</sub>the threshold voltage of the transistor. The threshold voltage, V<sub>TH</sub>, can be both positive, for an enhancement mode, and negative, for a depletion mode device. When V<sub>GS</sub> is greater than V<sub>TH</sub>, the gate voltage to drain current relationship is quadratic. Now plot the drain current vs. the square of the gate voltage. The line should be straight as seen in the second plot.
university/courses/electronics/electronics-lab-4m.txt · Last modified: 02 Feb 2023 20:41 by Doug Mercer

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