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| university:courses:electronics:electronics-lab-4m [12 Jul 2019 13:01] – [Activity 4M. NMOS FET characteristic curves] Pop Andreea | university:courses:electronics:electronics-lab-4m [22 Jul 2020 11:25] – [Procedure:] Figure 3 Replaced Vds with Vgs Pop Andreea |
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| <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-bb.png|}}</WRAP> | <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-bb.png|}}</WRAP> |
| <WRAP centeralign> Figure 2 NMOS I<sub>D</sub> vs V<sub>DS</sub> breadboard circuit </WRAP> | <WRAP centeralign> Figure 2 NMOS I<sub>D</sub> vs V<sub>GS</sub> breadboard circuit </WRAP> |
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| The arbitrary waveform generator should be configured for a 100 Hz triangle wave with 2.5 volt amplitude and 1.25 volt offset. The differential scope channel 2 (2+/-) measures the current in the resistor (and in the transistor). Scope channel 1 should be connected to display the output of the waveform generator. The current flowing through the transistor is the voltage difference 2+ and 2- divided by the resistor value (100Ω). | The arbitrary waveform generator should be configured for a 100 Hz triangle wave with 2.5 volt amplitude peak-to-peak and 1.25 volt offset. The differential scope channel 2 (2+/-) measures the current in the resistor (and in the transistor). Scope channel 1 should be connected to display the output of the waveform generator. The current flowing through the transistor is the voltage difference 2+ and 2- divided by the resistor value (100Ω). |
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| <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-xy.png|}}</WRAP> | <WRAP centeralign>{{:university:courses:electronics:nmos_id_vs_vgs-xy.png|}}</WRAP> |
| <WRAP centeralign> Figure 3 NMOS I<sub>D</sub> vs V<sub>DS</sub> XY plot </WRAP> | <WRAP centeralign> Figure 3 NMOS I<sub>D</sub> vs V<sub>GS</sub> XY plot </WRAP> |
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| Load the captured data in to Excel and calculate the current. Plot the drain current vs. the gate voltage of the transistor (V<sub>GS</sub>). No drain current should flow when V<sub>GS</sub> is less than V<sub>TH</sub>the threshold voltage of the transistor. The threshold voltage, V<sub>TH</sub>, can be both positive, for an enhancement mode, and negative, for a depletion mode device. When V<sub>GS</sub> is greater than V<sub>TH</sub>, the gate voltage to drain current relationship is quadratic. Now plot the drain current vs. the square of the gate voltage. The line should be straight as seen in the second plot. | Load the captured data in to Excel and calculate the current. Plot the drain current vs. the gate voltage of the transistor (V<sub>GS</sub>). No drain current should flow when V<sub>GS</sub> is less than V<sub>TH</sub>the threshold voltage of the transistor. The threshold voltage, V<sub>TH</sub>, can be both positive, for an enhancement mode, and negative, for a depletion mode device. When V<sub>GS</sub> is greater than V<sub>TH</sub>, the gate voltage to drain current relationship is quadratic. Now plot the drain current vs. the square of the gate voltage. The line should be straight as seen in the second plot. |
| The setup is the same as the previous experiment except now Scope channel 1 is set to display the transistor V<sub>DS</sub>. The drain voltage is swept using a 3 volt peak to peak ramp with an offset equal to 1.5V from the arbitrary waveform generator. V<sub>DS</sub> is measured by single ended scope input 1+. The drain current is measured by differential scope input 2+/- across the 100Ω resistor R<sub>1</sub>. | The setup is the same as the previous experiment except now Scope channel 1 is set to display the transistor V<sub>DS</sub>. The drain voltage is swept using a 3 volt peak to peak ramp with an offset equal to 1.5V from the arbitrary waveform generator. V<sub>DS</sub> is measured by single ended scope input 1+. The drain current is measured by differential scope input 2+/- across the 100Ω resistor R<sub>1</sub>. |
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| A stair-step waveform will be needed to drive the gate of the transistor. Using the buffer in the Scopy Signal Generator tool, construct a stair-step waveform with 5 levels on channel 2 (W2). Load the following csv file (extract from archive): {{:university:courses:electronics:stair-step.zip|}}. Set the amplitude to 3V and sampleRate to 100Hz. | A stair-step waveform will be needed to drive the gate of the transistor. Using the buffer in the Scopy Signal Generator tool, construct a stair-step waveform with 5 levels on channel 2 (W2). Load the following csv file (extract from archive): {{:university:courses:electronics:stair-step.zip|}}. Set the amplitude to 3V peak-to-peak and sampleRate to 100Hz. |
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| ===== Procedure: ===== | ===== Procedure: ===== |
| <WRAP round download> | <WRAP round download> |
| **Lab Resources:** | **Lab Resources:** |
| * Fritzing files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/fritzing/nmos_i_vs_v_bb | nmos_i_vs_v_bb]] | * Fritzing files: [[downgit>education_tools/tree/master/m2k/fritzing/nmos_i_vs_v_bb | nmos_i_vs_v_bb]] |
| * LTSpice files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/ltspice/nmos_curve_ltspice | nmos_curve_ltspice]] | * LTSpice files: [[downgit>education_tools/tree/master/m2k/ltspice/nmos_curve_ltspice | nmos_curve_ltspice]] |
| </WRAP> | </WRAP> |
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