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| university:courses:electronics:electronics-lab-31 [05 Mar 2019 12:39] – [Bonus Step 3 Directions:] Antoniu Miclaus | university:courses:electronics:electronics-lab-31 [07 Feb 2022 15:18] (current) – [Activity: The Phase Locked Loop.] Doug Mercer |
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| ======Activity: The Phase Locked Loop.====== | ======Activity: The Phase Locked Loop - ADALM2000====== |
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| =====Objective:===== | =====Objective:===== |
| =====Hardware Setup:===== | =====Hardware Setup:===== |
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| Turn on the fixed +5 volt power supply and connect the 9 volt battery to your circuit. Connect AWG1 output to F<sub>REF</sub> as shown in figure 4. Configure AWG1 as a square wave with an amplitude of 5 V and an offset of 2.5 V ( 0 to 5 V swing ) and initially set the frequency to what you measured in step 1 when V<sub>IN</sub> was set to 2.5 V ( should be around 250 KHz ). Connect scope channel input CH1+ to the F<sub>REF</sub> input and scope channel CH2+ to V<sub>SQR</sub> output as shown in figure 6. You should ground the CH1- and CH2- inputs as well. Set the scope to trigger off the rising edge of channel 1 ( the F<sub>REF</sub> signal ). | Turn on the fixed +5 volt power supply and connect the 9 volt battery to your circuit. Connect AWG1 output to F<sub>REF</sub> as shown in figure 4. Configure AWG1 as a square wave with an amplitude of 5 V peak-to-peak and an offset of 2.5 V ( 0 to 5 V swing ) and initially set the frequency to what you measured in step 1 when V<sub>IN</sub> was set to 2.5 V ( should be around 250 KHz ). Connect scope channel input CH1+ to the F<sub>REF</sub> input and scope channel CH2+ to V<sub>SQR</sub> output as shown in figure 6. You should ground the CH1- and CH2- inputs as well. Set the scope to trigger off the rising edge of channel 1 ( the F<sub>REF</sub> signal ). |
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| {{ :university:courses:electronics:PLL_Complete_PLL_Circuit_Hardware_Setup.png |}} | {{ :university:courses:electronics:PLL_Complete_PLL_Circuit_Hardware_Setup.png |}} |
| <WRAP round download> | <WRAP round download> |
| **Resources:** | **Resources:** |
| * Fritzing files: [[ https://minhaskamal.github.io/DownGit/#/home?url=https://github.com/analogdevicesinc/education_tools/tree/master/m2k/fritzing/phase_locked_loop_bb | phase_locked_loop_bb]] | * Fritzing files: [[downgit>education_tools/tree/master/m2k/fritzing/phase_locked_loop_bb | phase_locked_loop_bb]] |
| </WRAP> | </WRAP> |
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| [1] [[university:courses:electronics:electronics-lab-30|Activity: CMOS Logic Circuits, Transmission Gate XOR]] | [1] [[university:courses:electronics:electronics-lab-30|Activity: CMOS Logic Circuits, Transmission Gate XOR]] |
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| [[http://www.analog.com/static/imported-files/tutorials/MT-086.pdf]]\\ | [[adi>static/imported-files/tutorials/MT-086.pdf]]\\ |
| [[http://en.wikipedia.org/wiki/Phase-locked_loop]] | [[wp>Phase-locked_loop]] |
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| **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]].** | **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]].** |
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