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university:courses:electronics:electronics-lab-30 [24 Jul 2017 16:13] – change amplitude value to peak-peak Antoniu Miclausuniversity:courses:electronics:electronics-lab-30 [15 Dec 2017 03:37] – Added breadboard circuit and scopeshots for the lab sections Dann Kristofer Bautista
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 used to monitor the inputs and outputs of the circuit as needed. The fixed +5 V power supply is to be  used to monitor the inputs and outputs of the circuit as needed. The fixed +5 V power supply is to be 
 used to power your circuit. The fixed -5V supply should be disabled during this Lab. used to power your circuit. The fixed -5V supply should be disabled during this Lab.
 +
 +{{ :university:courses:electronics:cmos_logic_gate_xor_and_xnor_hardware_setup.png |}}
 +
 +<WRAP centeralign> Figure 4, Exclusive OR and XNOR gate breadboard circuit </WRAP>
  
 =====Procedure:===== =====Procedure:=====
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 First apply logic Low to A by opening the AWG control screen and setting AWG1 to 0 V DC. Apply logic low  First apply logic Low to A by opening the AWG control screen and setting AWG1 to 0 V DC. Apply logic low 
 to the B input by setting AWG2 to 0 V DC. to the B input by setting AWG2 to 0 V DC.
 +
 +{{ :university:courses:electronics:cmos_logic_gate_xor_and_xnor_scopeshot1.png |}}
 +<WRAP centeralign> Figure 5, Cout and Cbar output </WRAP>
  
 Observe the output C of the gate on scope Channel 1. A steady DC voltage should appear on the scope  Observe the output C of the gate on scope Channel 1. A steady DC voltage should appear on the scope 
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 {{ :university:courses:electronics:axor_f4.png?600 |}} {{ :university:courses:electronics:axor_f4.png?600 |}}
- +<WRAP centeralign> Figure 6: XOR Gate phase detector </WRAP>
-<WRAP centeralign> Figure 4, XOR Gate phase detector </WRAP>+
  
 =====Hardware Setup:===== =====Hardware Setup:=====
  
 Configure both AWG channels as square waves with 5 V amplitudes and 2.5 V offsets ( 0 to 5 V swings).  Configure both AWG channels as square waves with 5 V amplitudes and 2.5 V offsets ( 0 to 5 V swings). 
-Set both AWG1 and AWG2 to a frequency of 10 KHz. Also be sure to start with the phase of both AWG1 and +Set both AWG1 and AWG2 to a frequency of 1 KHz. Also be sure to start with the phase of both AWG1 and 
 AWG2 set to 0°. Be sure to set the AWGs to run synchronously. AWG2 set to 0°. Be sure to set the AWGs to run synchronously.
 +
 +{{ :university:courses:electronics:cmos_logic_gate_xor_and_xnor_hardware_setup2.png |}}
 +<WRAP centeralign> Figure 7: XOR Gate phase detector breadboard circuit </WRAP>
  
 =====Procedure:===== =====Procedure:=====
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 AWG 2 to the values listed in the table and record the DC voltage you observe at the output of the phase  AWG 2 to the values listed in the table and record the DC voltage you observe at the output of the phase 
 detector. detector.
 +
 +{{ :university:courses:electronics:cmos_logic_gate_xor_and_xnor_scopeshot2.png |}}
 +<WRAP centeralign> Figure 8: XOR Gate phase detector sample output </WRAP>
  
 ^AWG1 Phase^AWG2 Phase^Output Voltage^ ^AWG1 Phase^AWG2 Phase^Output Voltage^
university/courses/electronics/electronics-lab-30.txt · Last modified: 14 Jun 2022 14:12 by Doug Mercer

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