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university:courses:electronics:electronics-lab-14 [24 Sep 2019 12:31]
Pop Andreea [Procedure]
university:courses:electronics:electronics-lab-14 [25 Jun 2020 22:07] (current)
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 Change the digital pattern. Try the Random pattern and open the FFT window on the scope. You can also load custom patterns by making a plain text csv file with a column of numbers ranging from 0 to 255 (for the 8 bit wide bus). Load your custom pattern and see what happens. Change the digital pattern. Try the Random pattern and open the FFT window on the scope. You can also load custom patterns by making a plain text csv file with a column of numbers ranging from 0 to 255 (for the 8 bit wide bus). Load your custom pattern and see what happens.
  
-Here are some pre-made waveform files you can try: Sine, Triangle, Gaussian pulse etc. [[ https://​minhaskamal.github.io/​DownGit/#/​home?​url=https://​github.com/​analogdevicesinc/​education_tools/​tree/​master/​m2k/​import_waveforms/​waveforms_pg | waveforms_pg]]+Here are some pre-made waveform files you can try: Sine, Triangle, Gaussian pulse etc. [[downgit>education_tools/​tree/​master/​m2k/​import_waveforms/​waveforms_pg | waveforms_pg]]
 =====AD5626 12-bit nanoDAC===== =====AD5626 12-bit nanoDAC=====
  
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 ====Procedure==== ====Procedure====
 Open Scopy and enable the positive power supply to 5V. in Pattern generator you should configure the DAC input signals according to the timing diagram of AD5626 presented in datasheet. Open Scopy and enable the positive power supply to 5V. in Pattern generator you should configure the DAC input signals according to the timing diagram of AD5626 presented in datasheet.
-Start by configuring SPI signals. Create a group channel with DIO0, DIO1 and DIO2. If the connections were done as in figure 8 then DIO0 is the clock signal, DIO2 the data signal and DIO0 the /CS signal. ​+Start by configuring SPI signals. Create a group channel with DIO0, DIO1 and DIO2. If the connections were done as in figure 8 then DIO1 is the clock signal, DIO2 the data signal and DIO0 the /CS signal
 +Pay attention that the digital channels are in the right order when grouped as SPI (see figure 11)
 It is specified in datasheet that the clock width for both high and low states should be at least 30 ns. From this you can compute the clock period and therefore maximum frequency. ​ It is specified in datasheet that the clock width for both high and low states should be at least 30 ns. From this you can compute the clock period and therefore maximum frequency. ​
 Set the clock frequency to 1Mhz. Set CLK Polarity and CLK Phase to 1.  Set the clock frequency to 1Mhz. Set CLK Polarity and CLK Phase to 1. 
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 <WRAP round download>​ <WRAP round download>​
 **Resources:​** **Resources:​**
-  * Fritzing files: [[ https://​minhaskamal.github.io/​DownGit/#/​home?​url=https://​github.com/​analogdevicesinc/​education_tools/​tree/​master/​m2k/​fritzing/​IC_temperature_sensors_bb ​IC_temperature_sensors_bb]] +  * Fritzing files: [[downgit>education_tools/​tree/​master/​m2k/​fritzing/​dac_bb ​dac_bb]] 
-  * LTspice files: [[ https://​minhaskamal.github.io/​DownGit/#/​home?​url=https://​github.com/​analogdevicesinc/​education_tools/​tree/​master/​m2k/​ltspice/​IC_temperature_sensors_ltspice ​IC_temperature_sensors_ltspice]]+  * LTspice files: [[downgit>education_tools/​tree/​master/​m2k/​ltspice/​dac_ltspice ​dac_ltspice]]
 </​WRAP>​ </​WRAP>​
  
university/courses/electronics/electronics-lab-14.1569321085.txt.gz · Last modified: 24 Sep 2019 12:31 by Pop Andreea