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university:courses:electronics:electronics-lab-13a [21 Apr 2013 02:16] – [Questions:] Doug Merceruniversity:courses:electronics:electronics-lab-13a [24 Jan 2023 20:03] – [Activity: Amplifier Output Stages] Doug Mercer
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-====== Activity 13A. Amplifier Output Stages ======+====== ActivityAmplifier Output Stages - ADALM2000======
  
 ===== Objective: ===== ===== Objective: =====
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 ===== Materials: ===== ===== Materials: =====
-Analog discovery Lab hardware\\+ADALM2000 Active Learning Module\\
 Solder-less breadboard\\ Solder-less breadboard\\
 Jumper wires\\ Jumper wires\\
-2 - 100Ω resistors\\ +2 - 100 Ω resistors\\ 
-1 - 2.2KΩ resistor\\ +1 - 2.2 KΩ resistor\\ 
-2 - 10KΩ resistors\\+2 - 10 KΩ resistors\\
 2 - small signal NPN transistors (SSM2212 with matching V<sub>BE</sub> preferred)\\ 2 - small signal NPN transistors (SSM2212 with matching V<sub>BE</sub> preferred)\\
 2 - small signal PNP transistors (SSM2220 with matching V<sub>BE</sub> preferred)\\ 2 - small signal PNP transistors (SSM2220 with matching V<sub>BE</sub> preferred)\\
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 ===== Directions: ===== ===== Directions: =====
  
-Before starting make sure the power supplies on the Analog Discovery hardware are turned off. The circuit and the connections to the Lab hardware are as indicated in figure 1. Scope input 1+ should to be connected to the junction of Q<sub>1</sub> and Q<sub>2</sub> bases. Scope input 2+ should to be connected to the junction of Q<sub>1</sub> and Q<sub>2</sub> emitters.+Before starting make sure the power supplies on the ADALM2000 are turned off. The circuit and the connections to the Lab hardware are as indicated in figure 1. Scope input 1+ should to be connected to the junction of Q<sub>1</sub> and Q<sub>2</sub> bases. Scope input 2+ should to be connected to the junction of Q<sub>1</sub> and Q<sub>2</sub> emitters.
  
 {{ :university:courses:electronics:a13a_f1.png?500 |}} {{ :university:courses:electronics:a13a_f1.png?500 |}}
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 ===== Hardware Setup: ===== ===== Hardware Setup: =====
  
-The waveform generator, W1, should be configured for a 1 KHz sine wave with 3.0 volt amplitude peak amplitude and 0 offset. Channel one of the scope should be connected to display the output of the first generator and both scope channels 1 and 2 should be set to display 1V per division.+Channel one of the scope should be connected to display the output of the first generator and both scope channels 1 and 2 should be set to display 1V per division. The breadboard connections are shown in figure 2. 
 +{{ :university:courses:electronics:a13a_f2a.png? |}}
  
-===== Procedure: =====+<WRAP centeralign> Figure 2 Push - Pull Output stage Breadboard Circuit </WRAP>
  
-Next, apply power and adjust the waveform generator so that W1 is a 100 Hz triangle wave with 0V offset and 3.0 V amplitude values. Use the oscilloscope in the x-y mode to observe the voltage-transfer curve of the circuit. Record the curve on paper, label all breakpoints, slopes, and saturation levels, and justify them in terms of circuit operation and given component values. 
  
-Switch the scope to just the time display mode, and adjust the waveform generator so that W1 is a 1 kHz sine wave with the amplitude V.+===== Procedure: ===== 
 +The waveform generatorW1, should be configured for a 1 KHz sine wave with 6.0 volt amplitude peak-to-peak and offset. Using scope channel 1 to observe the input at W1 and scope channel 2 to observe the output of the amplifier at R<sub>L</sub>
 +{{ :university:courses:electronics:a13a_f3_wf.png? |}}
  
-• Starting with the amplitude = 0 V, gradually increase it until you just begin to see an signal on scope channel 2 appear at the output. For what range of amplitude values of W1 can we say that both BJT's are essentially off? Confirm this by observing the voltages of the current-sensing resistances R<sub>1</sub> and R<sub>2</sub>.+<WRAP centeralignFigure 3 Push - Pull Output stage Waveforms </WRAP>
  
-• Raise W1 to 3.0V amplitude value, and record the amplitude of the output waveform as well as the collector currents of the BJTs, which can be found via Ohm's law from the voltages across R<sub>1</sub> and R<sub>2</sub>, and justify your findings in terms of circuit operation and the given component values.+Next, apply power and adjust the waveform generator so that W1 is a 100 Hz triangle wave with 0V offset and 3.0 V amplitude peak-to-peak. Use the oscilloscope in the x-y mode to observe the voltage-transfer curve of the circuit. 
  
-• Repeat, but with W1 raised a 5.0V amplitude value; and comment.+{{ :university:courses:electronics:a13a_f4_tc.png?400 |}}
  
-Simulate the circuit of figure 1 using QUCS, compare with your lab findings, and justify any differences.+<WRAP centeralign> Figure 4 Voltage-transfer curve </WRAP>
  
 ===== Questions: ===== ===== Questions: =====
 +Record the curve on paper, label all breakpoints, slopes, and saturation levels, and justify them in terms of circuit operation and given component values.
 +
 +Switch the scope to just the time display mode, and adjust the waveform generator so that W1 is a 1 kHz sine wave with the amplitude = 0 V.
  
-Add questions here:+• Starting with the amplitude = 0 V, gradually increase it until you just begin to see a signal on scope channel 2 appear at the output. For what range of amplitude values of W1 can we say that both BJT's are essentially off? Confirm this by observing the voltages of the current-sensing resistances R<sub>1</sub> and R<sub>2</sub>
 + 
 +• Raise W1 to 6.0V amplitude peak-to-peak value, and record the amplitude of the output waveform as well as the collector currents of the BJTs, which can be found via Ohm's law from the voltages across R<sub>1</sub> and R<sub>2</sub>, and justify your findings in terms of circuit operation and the given component values. 
 + 
 +• Repeat, but with W1 raised a 10.0V amplitude peak-to-peak value; and comment. 
 + 
 +Simulate the circuit of figure 1 using QUCS, compare with your lab findings, and justify any differences.
  
 ====== Reducing Output Distortion: ====== ====== Reducing Output Distortion: ======
  
 The large amount of distortion at the zero-crossings in the basic push-pull stage of figure 1 is a result of a dead zone when both the NPN and PNP emitter followers are off. The waveform's dead zone at the zero-crossings is dramatically reduced if we pre-bias the BJTs with two V<sub>BE</sub> drops, as shown in figure 2. Here, the pre-bias function is provided by diode connected NPN Q<sub>1</sub> and PNP Q<sub>3</sub>. Resistors R<sub>1</sub> and R<sub>2</sub> provide bias current and set the idle current that flows in the output devices Q<sub>2</sub> and Q<sub>4</sub>. The large amount of distortion at the zero-crossings in the basic push-pull stage of figure 1 is a result of a dead zone when both the NPN and PNP emitter followers are off. The waveform's dead zone at the zero-crossings is dramatically reduced if we pre-bias the BJTs with two V<sub>BE</sub> drops, as shown in figure 2. Here, the pre-bias function is provided by diode connected NPN Q<sub>1</sub> and PNP Q<sub>3</sub>. Resistors R<sub>1</sub> and R<sub>2</sub> provide bias current and set the idle current that flows in the output devices Q<sub>2</sub> and Q<sub>4</sub>.
- 
 ===== Directions: ===== ===== Directions: =====
  
-With the power turned off, assemble the circuit of figure 2, keeping leads as short and neat as possible. NPN transistors Q<sub>1</sub> and Q<sub>2</sub>, PNP transistor Q<sub>3</sub>and Q<sub>4</sub> should be selected from the available devices with the best matching of V<sub>BE</sub>. Transistors fabricated in the same package such as the SSM2212 or the CA3046 tend to match much better than individual devices.+With the power turned off, assemble the circuit of figure 5, keeping leads as short and neat as possible. NPN transistors Q<sub>1</sub> and Q<sub>2</sub>, PNP transistor Q<sub>3</sub>and Q<sub>4</sub> should be selected from the available devices with the best matching of V<sub>BE</sub>. Transistors fabricated in the same package such as the SSM2212 or the CA3046 tend to match much better than individual devices.
  
 {{ :university:courses:electronics:a13a_f2.png?500 |}} {{ :university:courses:electronics:a13a_f2.png?500 |}}
  
-<WRAP centeralign> Figure Push - pull output stage with zero-crossing distortion elimination. </WRAP>+<WRAP centeralign> Figure Push - Pull output stage with zero-crossing distortion elimination. </WRAP>
  
-If we examine, in figure 2, the loop formed by the base emitter voltages of Q<sub>1</sub>, Q<sub>2</sub>, Q<sub>3</sub> and Q<sub>4</sub> we know that the sum of the voltage drops around the loop must sum to zero. Thus if Q<sub>1</sub> is identical to Q<sub>2</sub> and Q<sub>3</sub> is identical to Q<sub>4</sub>, the voltage around the loop will be zero only when the current in Q<sub>1</sub> is identical to the current in Q<sub>2</sub> and the current in Q<sub>3</sub> is identical to the current in Q<sub>4</sub>. Thus when the output is at zero volts i.e. there is no current in R<sub>L</sub>, the input must also be at zero volts.+If we examine, in figure 5, the loop formed by the base emitter voltages of Q<sub>1</sub>, Q<sub>2</sub>, Q<sub>3</sub> and Q<sub>4</sub> we know that the sum of the voltage drops around the loop must sum to zero. Thus if Q<sub>1</sub> is identical to Q<sub>2</sub> and Q<sub>3</sub> is identical to Q<sub>4</sub>, the voltage around the loop will be zero only when the current in Q<sub>1</sub> is identical to the current in Q<sub>2</sub> and the current in Q<sub>3</sub> is identical to the current in Q<sub>4</sub>. Thus when the output is at zero volts i.e. there is no current in R<sub>L</sub>, the input must also be at zero volts. 
 +===== Hardware Setup: ===== 
 + 
 +Channel one of the scope should be connected to display the output of the first generator and both scope channels 1 and 2 should be set to display 1V per division. The breadboard connections are shown in figure 6. 
 +{{ :university:courses:electronics:a13a_f6.png? |}} 
 + 
 +<WRAP centeralign> Figure 6 Push - Pull Output stage with zero-crossing distortion elimination Breadboard Circuit </WRAP> 
 + 
 +===== Procedure: ===== 
 +The waveform generator, W1, should be configured for a 1 KHz sine wave with 6.0 volt amplitude peak-to-peak and 0 offset. Using scope channel 1 to observe the input at W1 and scope channel 2 to observe the output of the amplifier at R<sub>L</sub>
 +{{ :university:courses:electronics:a13a_f7_wf.png? |}} 
 + 
 +<WRAP centeralign> Figure 7 Push - Pull Output stage with zero-crossing distortion elimination Waveforms </WRAP>
  
 ===== Questions: ===== ===== Questions: =====
  
-• Display the input / output transfer curve of the circuit of figure 2, record it on paper, label all breakpoints, slopes, and saturation levels, and justify them in terms of circuit operation and the given component values.+• Display the input / output transfer curve of the circuit of figure 5, record it on paper, label all breakpoints, slopes, and saturation levels, and justify them in terms of circuit operation and the given component values.
  
 • Apply a 1-kHz sine wave of 0 V offset and various amplitudes, and verify that the circuit yields Vout ? Vin all the way down to small amplitudes. What is the upper limit on the amplitude of W1 before the circuit starts to distort? Justify quantitatively in terms of the transfer curve just observed. • Apply a 1-kHz sine wave of 0 V offset and various amplitudes, and verify that the circuit yields Vout ? Vin all the way down to small amplitudes. What is the upper limit on the amplitude of W1 before the circuit starts to distort? Justify quantitatively in terms of the transfer curve just observed.
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 Measure the input impedance by inserting a 10K? resistor in series with the signal generator (between W1 and the emitters of Q<sub>1</sub>and Q<sub>3</sub>) and connecting the channel 1 differential scope inputs, 1+ , 1- across the 10K? resistor. Capture the input current vs. the input voltage and calculate the input resistance from the slope of the curve. Justify your results based on the component values used in the circuit. Measure the input impedance by inserting a 10K? resistor in series with the signal generator (between W1 and the emitters of Q<sub>1</sub>and Q<sub>3</sub>) and connecting the channel 1 differential scope inputs, 1+ , 1- across the 10K? resistor. Capture the input current vs. the input voltage and calculate the input resistance from the slope of the curve. Justify your results based on the component values used in the circuit.
  
-Simulate the circuit of figure using QUCS, compare with your lab findings, and justify any differences.+Simulate the circuit of figure using QUCS, compare with your lab findings, and justify any differences.
  
 ====== Another Configuration: ====== ====== Another Configuration: ======
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 {{ :university:courses:electronics:a13a_f3.png?500 |}} {{ :university:courses:electronics:a13a_f3.png?500 |}}
  
-<WRAP centeralign> Figure 3 emitter follower zero-crossing distortion elimination </WRAP>+<WRAP centeralign> Figure 8 Emitter Follower zero-crossing distortion elimination </WRAP> 
 +===== Hardware Setup: ===== 
 + 
 +Channel one of the scope should be connected to display the output of the first generator and both scope channels 1 and 2 should be set to display 1V per division. The breadboard connections are shown in figure 9. 
 +{{ :university:courses:electronics:a13a_f9.png? |}} 
 + 
 +<WRAP centeralign> Figure 9 Emitter Follower zero-crossing distortion elimination Breadboard Circuit </WRAP> 
 + 
 +===== Procedure: ===== 
 +The waveform generator, W1, should be configured for a 1 KHz sine wave with 6.0 volt amplitude peak-to-peak and 0 offset. Using scope channel 1 to observe the input at W1 and scope channel 2 to observe the output of the amplifier at R<sub>L</sub>
 +{{ :university:courses:electronics:a13a_f10_wf.png? |}} 
 + 
 +<WRAP centeralign> Figure 10 Emitter Follower zero-crossing distortion elimination Waveforms </WRAP> 
 + 
 +** Lab Resources:** 
 +  * LTSpice files: [[downgit>education_tools/tree/master/m2k/ltspice/amp_out_stg_ltspice | amp_out_stage_ltspice]] 
  
 ===== Questions: ===== ===== Questions: =====
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 Using your scope input, measure Vout as well as the voltage across R<sub>3</sub> and R<sub>4</sub> for the following DC values of Vin: -5 V, -4 V, -3 V, ... 0 V, ... , +4 V, +5 V. Then, tabulate Vout and the current in R<sub>L</sub> as well as the collector currents of Q<sub>2</sub> and Q<sub>4</sub> and comment. Use the offset of the waveform generator to set the DC value with the amplitude set to 0V. Using your scope input, measure Vout as well as the voltage across R<sub>3</sub> and R<sub>4</sub> for the following DC values of Vin: -5 V, -4 V, -3 V, ... 0 V, ... , +4 V, +5 V. Then, tabulate Vout and the current in R<sub>L</sub> as well as the collector currents of Q<sub>2</sub> and Q<sub>4</sub> and comment. Use the offset of the waveform generator to set the DC value with the amplitude set to 0V.
  
-Measure the input impedance by inserting a 10Kresistor in series with the signal generator (between W1 and the bases of Q<sub>1</sub>and Q<sub>3</sub>) and connecting the channel 1 differential scope inputs, 1+ , 1- across the 10Kresistor. Capture the input current vs. the input voltage and calculate the input resistance from the slope of the curve. Justify your results based on the component values used in the circuit. How do your results compare to what you measured for the circuit in figure 2?+Measure the input impedance by inserting a 10KΩ resistor in series with the signal generator (between W1 and the bases of Q<sub>1</sub>and Q<sub>3</sub>) and connecting the channel 1 differential scope inputs, 1+ , 1- across the 10KΩ resistor. Capture the input current vs. the input voltage and calculate the input resistance from the slope of the curve. Justify your results based on the component values used in the circuit. How do your results compare to what you measured for the circuit in figure 5?
  
-Simulate the circuit of figure 3 using QUCS, compare with your lab findings, and justify any differences.+Simulate the circuit of figure 3 using LTSpice or ADIsimPE, compare with your lab findings, and justify any differences.
  
 +<WRAP round download>
 +**Resources:**
 +  * Fritzing files: [[downgit>education_tools/tree/master/m2k/fritzing/output-stages | output_stages]]
 +  * LTspice files: [[downgit>education_tools/tree/master/m2k/ltspice/output_stages_ltspice | output_stages_ltspice ]]
 +</WRAP>
 ==== For Further reading: ==== ==== For Further reading: ====
-Output Stages [[http://www.analog.com/static/imported-files/tutorials/MT-207.pdf|(MT-207)]]\\ +Output Stages [[adi>static/imported-files/tutorials/MT-207.pdf|(MT-207)]]\\ 
-[[http://en.wikipedia.org/wiki/Push-pull_output|Push-Pull Outputs]]+[[wp>Push-pull_output|Push-Pull Outputs]] 
 + 
  
 **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]** **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]**
 +
  
  
  
university/courses/electronics/electronics-lab-13a.txt · Last modified: 24 Jan 2023 20:03 by Doug Mercer