Differences

This shows you the differences between two versions of the page.

--- university:courses:electronics:electronics-lab-11 [14 Aug 2017 15:24] – [Materials:] correct pnp transistor code Antoniu Miclaus
+++ university:courses:electronics:electronics-lab-11 [25 Jun 2020 22:07] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
-====== Activity 11. The Emitter follower (BJT) ======
+====== Activity: The Emitter follower (BJT) ======
 ===== Objective: =====
@@ Line 22: / Line 22: @@
 ===== Hardware Setup: =====
-The waveform generator should be configured for a 1 KHz Sine wave with 4 volt amplitude and 0 offset. The Single ended input of scope channel 2 (2+) is used to measure the voltage at the emitter. The Scope configured with channel 1+ connected to display the AWG generator output. When measuring the input to output error, channel 2 of the scope should be connected to display 2+ and 2- differential.
+The waveform generator should be configured for a 1 KHz Sine wave with 4 volt amplitude peak-to-peak and 0 offset. The Single ended input of scope channel 2 (2+) is used to measure the voltage at the emitter. The Scope configured with channel 1+ connected to display the AWG generator output. When measuring the input to output error, channel 2 of the scope should be connected to display 2+ and 2- differential.
-{{ :university:courses:electronics:a11_f2.png?500 |}}
+{{:university:courses:electronics:emit_flw-bb.png|}}
-<WRAP centeralign> Figure 2 Input, output waveforms </WRAP>
+<WRAP centeralign> Figure 2 Emitter Follower Breadboard Circuit </WRAP>
 ===== Procedure: =====
+{{:university:courses:electronics:emit_flw-wav.png|}}
+<WRAP centeralign> Figure 3 Emitter Follower Waveforms </WRAP>
 The incremental Gain (Vout / Vin) of the emitter follower should ideally be 1 but will always be slightly less than 1. The gain is generally given by the following equation:
@@ Line 45: / Line 48: @@
 {{ :university:courses:electronics:a11_f3.png?400 |}}
-<WRAP centeralign> Figure 3 Improved Emitter Follower </WRAP>
+<WRAP centeralign> Figure 4 Improved Emitter Follower </WRAP>
+===== Hardware Setup: =====
+{{:university:courses:electronics:imp_emit_flw-bb.png|}}
+<WRAP centeralign> Figure 5 Improved Emitter Follower Breadboard Circuit </WRAP>
+===== Procedure: =====
+{{:university:courses:electronics:imp_emit_flw-wave.png|}}
+<WRAP centeralign> Figure 6 Improved Emitter Follower Waveforms </WRAP>
 {{ :university:courses:electronics:a11_f4.png?500 |}}
-<WRAP centeralign> Figure 4 Input vs output error for resistor and current source load </WRAP>
+<WRAP centeralign> Figure 7 Input vs output error for resistor and current source load </WRAP>
 ====== Emitter follower output impedance ======
@@ Line 67: / Line 81: @@
 {{ :university:courses:electronics:a11_f5.png?400 |}}
-<WRAP centeralign> Figure 5 Output impedance test </WRAP>
+<WRAP centeralign> Figure 8 Output impedance test </WRAP>
 ===== Hardware Setup: =====
-The waveform generator should be configured for a 1 KHz Sine wave with 2 volt amplitude with the offset set equal to minus the V<sub>BE</sub> of Q<sub>1</sub> ( approximately -0.65V ). This injects a +/- 0.1mA (1V/10KΩ) current into Q<sub>1</sub>‘s emitter. Scope input 2+ measures the change in voltage seen at the emitter.
+The waveform generator should be configured for a 1 KHz Sine wave with 2 volt amplitude peak-to-peak with the offset set equal to minus the V<sub>BE</sub> of Q<sub>1</sub> ( approximately -0.65V ). This injects a +/- 0.1mA (1V/10KΩ) current into Q<sub>1</sub>‘s emitter. Scope input 2+ measures the change in voltage seen at the emitter.
+{{:university:courses:electronics:out_imp_test-bb.png|}}
+<WRAP centeralign> Figure 9 Output impedance test Breadboard Circuit </WRAP>
 ===== Procedure: =====
+{{:university:courses:electronics:out_imp_test-wav.png|}}
+<WRAP centeralign> Figure 10 Output impedance test Waveforms </WRAP>
 Plot the change in voltage measured at the emitter. The nominal emitter current in Q<sub>1</sub> is (5V – 0.65) / 4.7KΩ or 925uA. We can calculate r<sub>e</sub>from this current as 26mV/925uA or 28Ω. How does this r<sub>e</sub> compare to the value measured from the test data? Change the value of R<sub>1</sub> from 4.7 KΩ to 2.2 KΩ and re-measure the output impedance of the circuit. How has it changed and why??
@@ Line 94: / Line 115: @@
 {{ :university:courses:electronics:a11_f7.png?400 |}}
-<WRAP centeralign> Figure 7 Low offset follower </WRAP>
+<WRAP centeralign> Figure 11 Low offset follower </WRAP>
 ===== Hardware Setup: =====
-The waveform generator should be configured for a 1 KHz Sine wave with 2 volt amplitude with the offset set equal to 0. Scope input channel 2 is set to 500mV / Div.
+{{:university:courses:electronics:low_off_flw-bb.png|}}
+<WRAP centeralign> Figure 12 Low offset follower Breadboard Circuit </WRAP>
+The waveform generator should be configured for a 1 KHz Sine wave with 2 volt amplitude peak-to-peak with the offset set equal to 0. Scope input channel 2 is set to 500mV / Div.
 ===== Procedure: =====
+{{:university:courses:electronics:low_off_flw-wav.png|}}
+<WRAP centeralign> Figure 13 Low offset follower Waveforms </WRAP>
 {{ :university:courses:electronics:a11_f8.png?500 |}}
-<WRAP centeralign> Figure 8 </WRAP>
+<WRAP centeralign> Figure 14 </WRAP>
 {{ :university:courses:electronics:a11_f9.png?500 |}}
-<WRAP centeralign> Figure 9 </WRAP>
+<WRAP centeralign> Figure 15 </WRAP>
 == Driving a Capacitor ==
@@ Line 126: / Line 155: @@
 {{ :university:courses:electronics:a11_f10.png?400 |}}
-<WRAP centeralign> Figure 10 Balanced slew rate follower </WRAP>
+<WRAP centeralign> Figure 16 Balanced slew rate follower </WRAP>
+===== Hardware Setup: =====
+{{:university:courses:electronics:balanced_sr_flw-bb.png|}}
+<WRAP centeralign> Figure 17 Balanced slew rate follower Breadboard Circuit </WRAP>
+===== Procedure: =====
+{{:university:courses:electronics:balanced_sr_flw-wav1.png|}}
+<WRAP centeralign> Figure 18 Balanced slew rate follower Waveforms </WRAP>
+{{:university:courses:electronics:balanced_sr_flw-wav2.png|}}
+<WRAP centeralign> Figure 19 Balanced slew rate follower Waveforms </WRAP>
 {{ :university:courses:electronics:a11_f11.png?500 |}}
-<WRAP centeralign> Figure 11 </WRAP>
+<WRAP centeralign> Figure 20 </WRAP>
 {{ :university:courses:electronics:a11_f12.png?500 |}}
-<WRAP centeralign> Figure 12 </WRAP>
+<WRAP centeralign> Figure 21 </WRAP>
 {{ :university:courses:electronics:a11_f13.png?500 |}}
-<WRAP centeralign> Figure 13 </WRAP>
+<WRAP centeralign> Figure 22 </WRAP>
 An alternate approach to improving the emitter follower is to reduce the effective r<sub>e</sub> through negative feedback. Reducing r<sub>e</sub> can be addressed by adding a second transistor to increase the negative feedback factor by increasing the open-loop-gain. The single transistor is replaced by a pair with 100% voltage feedback to the emitter of the first transistor. This is often referred to as a complementary feedback pair. The value of R<sub>2</sub> is crucial to good linearity, as it sets the I<sub>C</sub> of transistor Q<sub>1</sub>, and also determines its collector loading.
@@ Line 150: / Line 195: @@
 {{ :university:courses:electronics:a11_f14.png?400 |}}
-<WRAP centeralign> Figure 14 Complementary Feedback Pair Emitter Follower </WRAP>
+<WRAP centeralign> Figure 23 Complementary Feedback Pair Emitter Follower </WRAP>
+===== Hardware Setup: =====
+{{:university:courses:electronics:compl_fb_flw-bb.png|}}
+<WRAP centeralign> Figure 24 Complementary Feedback Pair Emitter Follower Breadboard Circuit</WRAP>
+===== Procedure: =====
+{{:university:courses:electronics:compl_fb_flw-wav.png|}}
+<WRAP centeralign> Figure 25 Complementary Feedback Pair Emitter Follower Waveforms </WRAP>
 A minor addition to the complementary feedback pair emitter follower can provide a gain greater than 1. Resistor R<sub>3</sub> is added between the collector of PNP Q<sub>2</sub> and the emitter of NPN Q<sub>1</sub>. The output is now taken at the collector of Q<sub>2</sub>. The gain is approximated by the ratio of R<sub>3</sub> to R<sub>1</sub>, Gain = (R<sub>1</sub>+R<sub>3</sub>)/R<sub>1</sub>. In this example it is about 3.2.
@@ Line 162: / Line 217: @@
 {{ :university:courses:electronics:a11_f15.png?400 |}}
-<WRAP centeralign> Figure 15 Follower with gain greater than 1 </WRAP>
+<WRAP centeralign> Figure 26 Follower with gain greater than 1 </WRAP>
+===== Hardware Setup: =====
+{{:university:courses:electronics:flw_gain_gr_one-bb.png|}}
+<WRAP centeralign> Figure 27 Follower with gain greater than 1 Breadboard Circuit </WRAP>
+===== Procedure: =====
+{{:university:courses:electronics:flw_gain_gr_one-wav.png|}}
+<WRAP centeralign> Figure 28 Follower with gain greater than 1 Waveforms </WRAP>
 {{ :university:courses:electronics:a11_f16.png?500 |}}
-<WRAP centeralign> Figure 16 </WRAP>
+<WRAP centeralign> Figure 29 </WRAP>
 In addition to the gain (or as a result of it) the DC level of the output is shifted positive as compared to the gain of 1 version. This limits the range of input voltage where the circuit can operate as shown by the negative shift in the input DC level. The next plot normalizes out the DC offset.
@@ Line 172: / Line 237: @@
 {{ :university:courses:electronics:a11_f17.png?500 |}}
-<WRAP centeralign> Figure 17 </WRAP>
+<WRAP centeralign> Figure 30 </WRAP>
 To confirm that the gain is indeed about 3.2 the next plot divides the output by the gain and compares that to the input. In this example the actual gain is 3.16, most likely due to the resistor values not being exact.
@@ Line 178: / Line 243: @@
 {{ :university:courses:electronics:a11_f18.png?500 |}}
-<WRAP centeralign> Figure 18 </WRAP>
+<WRAP centeralign> Figure 31 </WRAP>
 ===== Questions: =====
@@ Line 195: / Line 260: @@
 {{ :university:courses:electronics:a11_f19.png?400 |}}
-<WRAP centeralign> Figure 19 Emitter Current Limit </WRAP>
+<WRAP centeralign> Figure 32 Emitter Current Limit </WRAP>
+===== Hardware Setup: =====
+{{:university:courses:electronics:emit_curr_limit-bb.png|}}
+<WRAP centeralign> Figure 33 Emitter Current Limit Breadboard Circuit</WRAP>
+===== Procedure: =====
+{{:university:courses:electronics:emit_curr_limit-wav.png|}}
+<WRAP centeralign> Figure 34 Emitter Current Limit Waveforms</WRAP>
 Where:
   -  R<sub>1</sub> base resistor limits base current to transistor Q1.
@@ Line 207: / Line 281: @@
 The concept in this circuit is that R<sub>2</sub> acts as current sense resistor. When the load current times R<sub>2</sub>, the sense voltage, reaches about 0.6 (for silicon transistors ) Q<sub>2</sub> begins to conduct and increases current in R<sub>1</sub> which limits  the base drive to Q<sub>1</sub>reducing  its output current. The maximum current from the circuit is reached when I<sub>L</sub>*R<sub>2</sub> = 0.6. This circuit can be used to protect amplifiers (including push pull amplifiers.), power supplies and other circuits; or it can be used as a constant current circuit. This is not a precision circuit; however it is a simple and effective circuit.
+<WRAP round download>
+**Resources:**
+  * Fritzing files: [[downgit>education_tools/tree/master/m2k/fritzing/bjt_emitter_ff_bb | bjt_emitter_ff_bb]]
+  * LTspice files: [[downgit>education_tools/tree/master/m2k/ltspice/bjt_emitter_ff_ltspice | bjt_emitter_ff_ltspice]]
+</WRAP>
 **Return to Lab Activity [[university:courses:electronics:labs|Table of Contents]]**

Wiki

Analog Devices Wiki

Differences

Analog Devices Wiki

Differences

Page Tools