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This version (29 Nov 2018 11:14) was approved by amiclaus.The Previously approved version (12 Nov 2018 12:36) is available.Diff

Activity 10. Shunt regulator

Objective:

The zero gain amplifier (Q1, R2) and stabilized current source (Q2, R3) can be used in conjunction with a common emitter amplifier stage (Q3) in negative feedback to build a two terminal circuit which provides a constant or regulated output voltage over a range of input currents.

Materials:

ADALM2000 Active Learning Module
Solder-less breadboard
Jumper wires
1 - 2.2KΩ Resistor (or any similar value)
1 - 100Ω resistor
1 - 1KΩ resistor (or similar value)
1 - 10KΩ variable resistor (potentiometer)
3 - small signal NPN transistors (2N3904 and SSM2212)

Directions:

The breadboard connections are as shown in figure 1 below. The output of the function generator drives one end of resistor R4. Resistors R1, R2 and transistor Q1 are connected as in previous zero gain amplifier section. Resistor R3 and transistor Q2 are added as in the stabilized current source section. If the SSM2212 matched NPN pair is used it is best that it be used for devices Q1 and Q2. Q3 is added with its emitter grounded, its base connected to the collector of Q2 and collector connected to the combined node of R1, R3 R4 and scope input 2+.

Figure 1 Band-gap shunt regulator

Hardware Setup:

Figure 2 Band-gap shunt regulator Breadboard Circuit

Waveform generator W1 should be configured for a 1 KHz triangle wave with 4 volt amplitude and 2V offset. The Single ended input of scope channel 2 (2+) is used to measure the regulated output voltage at the collector of Q3.

Procedure:

The regulated output voltage should be observed as the variable resistor R3 is adjusted.

Figure 3 output voltage vs. input voltage

Figure 4 output voltage vs. input current

Questions:

What affects the regulated output voltage as a load to ground is applied to the output voltage?

What determines or limits the current available to an output load?

Using an NPN transistor array:

The CA3045,46 ( LM3045, 46 ) NPN transistor array is a good alternate choice for building this example circuit. See pinout below.

All the emitters can be tired to ground ( pins 3,7,10,13 ). Devices Q1, Q2 and Q3 can be connected in parallel and serve as Q2 in figure 1. Q4 and Q5 can be used for Q1 and Q3 in figure 2. The 3 to 1 emitter area ratio will result in an output voltage very nearly 1.2 volts if R1 and R3 are both equal to 2KΩ.

Resources:

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university/courses/electronics/electronics-lab-10.txt · Last modified: 29 Nov 2018 11:14 by amiclaus