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university:courses:electronics:comms-lab-lfsr [27 Mar 2017 17:15]
dmercer [Directions:]
university:courses:electronics:comms-lab-lfsr [27 Mar 2017 17:17] (current)
dmercer [Procedure:]
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 =====Procedure:​===== =====Procedure:​=====
  
-Start the Waveforms ​software. Open power supply control window and turn on the fixed 5 Volt power supply, VP+. Open up the Digital Pattern Generator screen. Add a signal. Select DIO 5. Set the type to clock. You should see something that looks like the screen below in figure 2. Lastly, hit the Run button. +Start the Scopy software. Open power supply control window and turn on the +5 Volt power supply, VP+. Open up the Digital Pattern Generator screen. Add a signal. Select DIO 5. Set the type to clock. You should see something that looks like the screen below in figure 2. Lastly, hit the Run button.
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-{{ :​university:​courses:​electronics:​alfsr_f2.jpg?​500 |}}+
  
 <WRAP centeralign>​ Figure 2 Digital pattern generator screen. </​WRAP>​ <WRAP centeralign>​ Figure 2 Digital pattern generator screen. </​WRAP>​
  
-Open the edit signal parameters window ​by clicking on the little blue pencil icon. Make sure the type is set to clock and the output is set to PP (push-pull). Set the frequency to 5 KHz. With the Duty cycle set to 50%.+Open the edit signal parameters window. Make sure the type is set to clock and the output is set to PP (push-pull). Set the frequency to 5 KHz. With the Duty cycle set to 50%.
  
 Open the logic analyzer window and add a bus signal for DIO 0-3. Check the show as analog box when you make the bus. Hit the Run button. You should see a random sequence something like what is shown in figure 3. Notice that the pattern repeats every 15 clocks. Open the logic analyzer window and add a bus signal for DIO 0-3. Check the show as analog box when you make the bus. Hit the Run button. You should see a random sequence something like what is shown in figure 3. Notice that the pattern repeats every 15 clocks.
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-{{ :​university:​courses:​electronics:​alfsr_f3.jpg?​500 |}} 
  
 <WRAP centeralign>​ Figure 3 Logic Analyzer screen. </​WRAP>​ <WRAP centeralign>​ Figure 3 Logic Analyzer screen. </​WRAP>​
university/courses/electronics/comms-lab-lfsr.txt · Last modified: 27 Mar 2017 17:17 by dmercer