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university:courses:alm1k:circuits1:alm-cir-cascade-rc [24 Oct 2018 17:15]
Antoniu Miclaus [Directions:] add LTSpice files
university:courses:alm1k:circuits1:alm-cir-cascade-rc [03 Jan 2021 22:12]
Robin Getz fix links
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 If two passive RC low pass filters are cascaded the frequency response is not simply the product of the two first order RC transfer functions. This is because the ideal single pole response assumes a zero source impedance is driving the filter and there is no load on the output, i.e. filter drives an infinite impedance. However, directly connecting the second filter acts as a load for the first effectively changing the combined RC time constant. If you try to analyze the cascaded circuit by simply adding phasors you will soon realize the shortcomings of that simple technique. This is where using circuit simulation software is very helpful. If two passive RC low pass filters are cascaded the frequency response is not simply the product of the two first order RC transfer functions. This is because the ideal single pole response assumes a zero source impedance is driving the filter and there is no load on the output, i.e. filter drives an infinite impedance. However, directly connecting the second filter acts as a load for the first effectively changing the combined RC time constant. If you try to analyze the cascaded circuit by simply adding phasors you will soon realize the shortcomings of that simple technique. This is where using circuit simulation software is very helpful.
  
-As a pre-lab exercise enter the schematic shown in figure 1 into the [[http://​www.analog.com/​en/​design-center/​interactive-design-tools/​adisimpe.html|ADIsimPE]] or [[https://​www.analog.com/​en/​design-center/​design-tools-and-calculators/​ltspice-simulator.html|LTSpice]] circuit simulation, schematic entry software tools. Three different RC low-pass filter sections are included. The inputs of all three filters are driven by the same AC source V1. Resistor R5 and capacitor C5 form a simple single pole (1st order) filter with the output taken at node dB-0. Resistors R3 and R4 and capacitors C1 and C3 form a 2nd order filter with R4 = R3 and C3 = C1. Two points in this filter should be plotted, the output of the first section at node dB-1 and the output of the second section at node dB-2. Resistors R2 and R1 and capacitors C4 and C2 form another 2nd order filter with R1 = 10*R2 and C2 = C4/10. The two similar points in this filter should also be plotted, the output of the first section at node dB-3 and the output of the second section at node dB-4. This second filter keeps the RC time constant the same for both sections of the filter but reduces the loading effect by increasing the value of the second resistor by a factor of 10 and decreases the value of the second capacitor by a similar factor of 10 (keeping the RC product the same). Using a factor of 10 like this is a good rule of thumb to use when designing cascaded passive RC filters.+As a pre-lab exercise enter the schematic shown in figure 1 into the [[adi>en/​design-center/​interactive-design-tools/​adisimpe.html|ADIsimPE]] or [[adi>en/​design-center/​design-tools-and-calculators/​ltspice-simulator.html|LTSpice]] circuit simulation, schematic entry software tools. Three different RC low-pass filter sections are included. The inputs of all three filters are driven by the same AC source V1. Resistor R5 and capacitor C5 form a simple single pole (1st order) filter with the output taken at node dB-0. Resistors R3 and R4 and capacitors C1 and C3 form a 2nd order filter with R4 = R3 and C3 = C1. Two points in this filter should be plotted, the output of the first section at node dB-1 and the output of the second section at node dB-2. Resistors R2 and R1 and capacitors C4 and C2 form another 2nd order filter with R1 = 10*R2 and C2 = C4/10. The two similar points in this filter should also be plotted, the output of the first section at node dB-3 and the output of the second section at node dB-4. This second filter keeps the RC time constant the same for both sections of the filter but reduces the loading effect by increasing the value of the second resistor by a factor of 10 and decreases the value of the second capacitor by a similar factor of 10 (keeping the RC product the same). Using a factor of 10 like this is a good rule of thumb to use when designing cascaded passive RC filters.
  
 Run the simulation sweeping the input frequency from 100 Hz to 20 KHz. You should get a frequency response plot the looks something like figure 2. Run the simulation sweeping the input frequency from 100 Hz to 20 KHz. You should get a frequency response plot the looks something like figure 2.
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 **Resources:​** **Resources:​**
  
-  * Fritzing files: [[ https://​minhaskamal.github.io/​DownGit/#/​home?​url=https://​github.com/​analogdevicesinc/​education_tools/​tree/​master/​m1k/​fritzing/​cascaded_rc_bb |cascade_rc_bb]] +  * Fritzing files: [[downgit>education_tools/​tree/​master/​m1k/​fritzing/​cascaded_rc_bb |cascade_rc_bb]] 
-  * LTSpice files: [[ https://​minhaskamal.github.io/​DownGit/#/​home?​url=https://​github.com/​analogdevicesinc/​education_tools/​tree/​master/​m1k/​ltspice/​cascade_rc_ltspice | cascade_rc_ltspice]] +  * LTSpice files: [[downgit>education_tools/​tree/​master/​m1k/​ltspice/​cascade_rc_ltspice | cascade_rc_ltspice]] 
-  * ADISimPE files: [[ https://​minhaskamal.github.io/​DownGit/#/​home?​url=https://​github.com/​analogdevicesinc/​education_tools/​tree/​master/​m1k/​adisimpe/​cascaded_rc_adisimpe | cascade_rc_adisimpe]]+  * ADISimPE files: [[downgit>education_tools/​tree/​master/​m1k/​adisimpe/​cascaded_rc_adisimpe | cascade_rc_adisimpe]]
  
 **For Further Reading:** **For Further Reading:**
  
-[[https://​www.analog.com/​en/​design-center/​design-tools-and-calculators/​ltspice-simulator.html|LTSpice]]\\ +[[adi>en/​design-center/​design-tools-and-calculators/​ltspice-simulator.html|LTSpice]]\\ 
-[[http://​www.analog.com/​en/​design-center/​interactive-design-tools/​adisimpe.html|ADIsimPE]]+[[adi>en/​design-center/​interactive-design-tools/​adisimpe.html|ADIsimPE]]
  
 **Return to Lab Activity [[university:​courses:​alm1k:​alm_circuits_lab_outline|Table of Contents]]** **Return to Lab Activity [[university:​courses:​alm1k:​alm_circuits_lab_outline|Table of Contents]]**
  
university/courses/alm1k/circuits1/alm-cir-cascade-rc.txt · Last modified: 03 Jan 2021 22:12 by Robin Getz