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This version (02 Oct 2019 18:59) was approved by dmercer.The Previously approved version (31 May 2015 02:02) is available.Diff

Activity: Voltage Controlled RC Oscillator.

Objective:

The goal of this activity is to explore the use of the high gain inverting CMOS amplifier along with a voltage dependent resistor, NMOS transistor in triode region, to construct an RC oscillator who's frequency is controlled by the voltage applied to the gate of the NMOS transistor.

Notes:

As in all the ALM labs we use the following terminology when referring to the connections to the M1000 connector and configuring the hardware. The green shaded rectangles indicate connections to the M1000 analog I/O connector. The analog I/O channel pins are referred to as CA and CB. When configured to force voltage / measure current -V is added as in CA-V or when configured to force current / measure voltage -I is added as in CA-I. When a channel is configured in the high impedance mode to only measure voltage -H is added as CA-H.

Scope traces are similarly referred to by channel and voltage / current. Such as CA-V , CB-V for the voltage waveforms and CA-I , CB-I for the current waveforms.

High gain inverting amplifier

Materials:

ADALM1000 hardware module
Solder-less breadboard and jumper wire kit
1 - 0.01uF capacitor (103)
1 - 0.001uF capacitor (102)
1 - 4.7KΩ resistor
2 - 100KΩ resistors
1 - 5KΩ Potentiometer
1 - CD4007 CMOS transistor array

Background:

The simple two transistor CMOS inverter can also be viewed as a high gain amplifier. It consists of one PMOS device, M1 and one NMOS device M2. Generally the CMOS fabrication process is designed such that the magnitude of the threshold voltage, VTH, of the NMOS and PMOS devices are roughly equal i.e. complementary. The designer of the inverter then adjusts the width to length ratio, W/L, of the NMOS and PMOS devices such that their respective transconductance is also equal.

Figure 1 CMOS Inverting amplifier

Below in figure 2 is the schematic and pinout for the CD4007:

Figure 2 CD4007 CMOS transistor array pinout

As many as three individual inverters can be built from one CD4007 package. The simplest first one to configure as shown below is by connecting pins 8 and 13 together as the inverter output. Pin 6 will be the input. Be sure to connect pin 14 VDD to power and pin 7 VSS to ground.

Figure 3 one CD4007 CMOS inverter

A second Inverter is made by connecting pin 2 to VDD, pin 4 to VSS, pins 1 and 5 are connected together as the output and with pin 3 as the input. A third inverter is made by connecting pin 11 to VDD, pin 9 to VSS, pin 12 is the output and pin 10 is the input.

Directions:

First build the simple example shown figure 4 to test the input to output transfer function of the simple CMOS amplifier. The green boxes indicate connections to the connector on ALM1000. Connect +5V power supply to VCC (pin 14) and ground to GND (pin 7). Connect the output of the channel A voltage generator to one of the inverter inputs (pin 6) and connect the inverter output (pin 8,13) to channel B scope input CB-H in Hi-Z mode.

Figure 4 amplifier transfer function

Hardware Setup:

Configure the channel A voltage generator CA-V for a 200 Hz triangle wave with 0 V Min value and 5V Max value. Both scope channels should be set to 0.5V/Div.

Procedure:

Measure the DC input offset where the gain in the highest. Measure the slope of the output and calculate the DC gain of the amplifier as the ratio of the change in the output voltage to the change in input voltage at the center of the output swing (i.e. approx. around 2.5V). Remember the answer should be a negative number because the amplifier inverts.

Questions:

What is the gain from the input source, CA-V, to the output seen at the inverter output? At what DC voltage at the input is the gain the highest?

Two stage astable multivibrator:

Background:

There are basically two requirements to make an oscillator. The first is some sort of gain stage such as the CMOS inverter we just looked at and the second is some sort of frequency dependent or phase delay block like a RC time constant. Positive feedback around a cascade of two of these inverter stages such as was looked at in the MOS Multivibrator Activity completes the oscillator.

To understand how the circuit shown in figure 5 oscillates we first assume that the output of the first inverter stage ( at pins 8 and 13 ) is high, near VDD. This means that the output of the second inverter stage ( at pin 12 ) is low, near VSS. The high voltage on pins 8,13 will begin charging capacitor C1 through the combination of resistors R2, R3 and M5. The voltage on C1 is also the input to the first inverter stage at pin 6. Eventually the voltage on C1 becomes high enough to be above the threshold of the first inverter stage and the output will switch from the high voltage to a low voltage ( near VSS ). This also causes the output of the second inverter stage to switch from low to high. Now C1 driven by the output of stage 2, discharges through the resistors. Again, eventually the voltage at C1 and the resistors becomes low enough to switch stage 1 back to its original starting state completing one cycle and starting the next.

Directions:

First, be sure the power supplies are switched off before modifying your circuit. Working from the single inverter you constructed in figure 4 add a second inverter stage along with capacitor C1 and the NMOS transistor M5from the array to build the oscillator as shown in figure 5. The waveform generator is no longer needed but keep scope channels A and B in HI-Z mode connected as shown in the figure.

Figure 5 Voltage controlled oscillator

Hardware Setup:

Scope channels A and B should be set to Hi-Z mode. Set the Triggering to the rising edge of CB-V. Set the trigger level to 2.5 V. The horizontal time base will need to be adjusted so that a few cycles of the oscillator output frequency are displayed. This will change based on the setting of R4 Connect the positive 5 V power supply only after double checking your circuit connections.

Procedure:

Adjust the variable resistor R4 from one extreme to the other noting the voltage on the gate of NMOS transistor M5. Note the frequency of the oscillator. Increasing the voltage should noticeably increase the frequency of the oscillation. Make a table of frequency, duty-cycle for gate voltages from 0 to 5 V in 100 mV steps. Include the table in your lab review.

Questions:

Why does the frequency increase as the gate voltage of M5 increase?

What is the lowest and highest frequency that the circuit will oscillate at?

Try substituting other higher and lower value capacitors for C1 and again determine the range of frequencies from 0 to 5 V on the gate of M5.

For Further Reading:

Multivibrator

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university/courses/alm1k/alm-lab-vco.txt · Last modified: 02 Oct 2019 18:58 by dmercer