The objective of this activity is to investigate the use of the zero gain concept to produce an output current which is stabilized (less sensitive) to variations of the input current level.
As in all the ALM labs we use the following terminology when referring to the connections to the M1000 connector and configuring the hardware. The green shaded rectangles indicate connections to the M1000 analog I/O connector. The analog I/O channel pins are referred to as CA and CB. When configured to force voltage / measure current -V is added as in CA-V or when configured to force current / measure voltage -I is added as in CA-I. When a channel is configured in the high impedance mode to only measure voltage -H is added as CA-H.
Scope traces are similarly referred to by channel and voltage / current. Such as CA-V , CB-V for the voltage waveforms and CA-I , CB-I for the current waveforms.
ADALM1000 hardware module
1 - 2.2 KΩ Resistor
1 - 100 Ω Resistor
1 - 10 KΩ Resistor
2 - small signal NPN transistors (2N3904 or SSM2212)
The breadboard connections are as shown in figure 1. The voltage output of channel A, CA-V, drives one end of resistor R1. Resistors R1, R2 and transistor Q1 are connected as in previous zero gain amplifier activity. Since the VBE of Q2 is always smaller than the VBE of Q1, you should, if possible, select Q1 and Q2 from your inventory of devices such that (at the same collector current) Q2's VBE is less than Q1's VBE. The base of transistor Q2 is connected to the zero gain output at the collector of Q1. R3, connected between the +5 V supply and the collector of Q2, is used along with the channel B scope input, CB-H, to measure the collector current.
Figure 1 Stabilized current source
The channel A generator is set in the SVMI mode and should be configured for a 100 Hz triangle wave with 3.5 volt Max and 0.5 V Min value. The input of scope channel B is used to display the stabilized output current at the collector of Q2. The voltage seen at the collector of Q2 is an inverted version of the current. That is to say that as the current in Q2 increases the voltage decreases. You can use the gain and offset values for CB to shift the plot down ( set offset to the maximum voltage ) and invert the plot by setting the gain to -1.
The zero gain amplifier can be used to create a stabilized current source. Because the voltage seen at the collector of transistor Q1 is now more constant with changes in the input supply voltage as represented by CA-V, it can be used as the base voltage of Q2 to produce a much more constant current in transistor Q2.
This circuit is sometimes referred to as a peaking current source. Why do you think?
Based on the delta VBE of Q1 and Q2, at what input and output current would the gain be zero for different values of R2?
An exercise for the student is to plot the “stabilized” output current for all the various combinations of Q1 and Q2 from the available inventory of transistors. Why does it vary and by how much?
The output of the simple peaking current source is always less than the input current at the peak by a substantial fraction. What is that fraction and why?
How can the circuit be changed to make the output a larger fraction of, or even equal to or larger than, the input?
The output current has a narrow peak. How could multiple copies of the peaking current source be combined to produce a much wider, flatter peak?
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