The most recent version of this page is a draft.
This version is outdated by a newer approved version.This version (03 May 2019 11:39) was approved by Antoniu Miclaus.The Previously approved version (13 Apr 2015 01:46) is available.
This version is outdated by a newer approved version.This version (03 May 2019 11:39) was approved by Antoniu Miclaus.The Previously approved version (13 Apr 2015 01:46) is available.This is an old revision of the document!
Table of Contents
Activity 5M: MOS transistor common source amplifier
Objective:
The purpose of this activity is to investigate the common source configuration of the MOS transistor.
Notes:
As in all the ALM labs we use the following terminology when referring to the connections to the M1000 connector and configuring the hardware. The green shaded rectangles indicate connections to the M1000 analog I/O connector. The analog I/O channel pins are referred to as CA and CB. When configured to force voltage / measure current -V is added as in CA-V or when configured to force current / measure voltage -I is added as in CA-I. When a channel is configured in the high impedance mode to only measure voltage -H is added as CA-H.
Scope traces are similarly referred to by channel and voltage / current. Such as CA-V , CB-V for the voltage waveforms and CA-I , CB-I for the current waveforms.
Materials:
ADALM1000 hardware module
Solder-less breadboard
5 - Resistors
1 - 50KΩ Variable resistor, potentiometer
1 - small signal NMOS transistor (enhancement mode ZVN2110A or CD4007)
Directions:
The configuration, shown in figure 1, demonstrates the NMOS transistor used as a common source amplifier. Output load resistor RL is chosen such that, for the desired nominal drain current ID, the voltage appearing at VDS is approximately half way between +5 V and ground (2.5 volts). Adjustable resistor Rpot sets the nominal bias operating point for the transistor (VGS) to set the required ID. Voltage divider R1/R2 is chosen to provide a sufficiently large attenuation of the input stimulus from the channel A generator, CA-V, such that the amplitude is approximately the same as the signal amplitude seen at VDS.. This is done to more easily view the channel A generator signal, given the rather small signal that will appear at the gate of the transistor, VGS. The attenuated CA-V signal is AC coupled into the gate of the transistor with 4.7 uF C1so as not to disturb the DC bias condition.
Figure 1 Common source amplifier test configuration
Hardware Setup:
The channel A generator CA-V should be configured for a 1 KHz Sine wave with 3 volt Max and 0 volt Min ( 3 V p-p). Scope input channel CB-H is used to measure alternately the waveform at the gate and drain of M1.
Procedure:
The voltage gain, A, of the common source amplifier can be expressed as the ratio of load resistor RL to the small signal source resistance rs. The transconductance, gm, of the transistor is a function of the drain current ID and the so called gate overdrive voltage, VGS-Vth where Vth is the threshold voltage.
(1)
The small signal source resistance is 1/gm and can be viewed as being in series with the source. Now with a signal applied to the gate the same current flows in rs and the drain load RL. Thus the gain A is given by RL times gm.
(2)
Self-biased configuration with negative feedback.
Objective:
The purpose of this activity is to investigate effect of including negative feedback on the stability of the DC operating point.
Figure 2 Self Biased configuration
Questions:
How does adding negative feedback help to stabilize the DC operating point? Adding source degeneration
Objective:
The purpose of this activity is to investigate effect of the addition of source degeneration.
Additional Materials:
1 - 5KΩ Variable resistor, potentiometer
Directions:
Disconnect the source of M1 from ground and insert RS, a 5KΩ potentiometer, as shown in the following diagram. Adjust RS while noting the output signal seen at the drain of the transistor.
Figure 3 Source degeneration added
Questions:
What effect does adding RS have to the DC operating point of the circuit and how much would you need to adjust Rpot to return the circuit to the same DC bias (ID) you had in figure 1?
What is the effect on the voltage gain, A, by increasing RS? Write down the new gain equation similar to equation (2) above.
Source degeneration gain equation:
Increasing AC gain of source degenerated amplifier
Adding the source degeneration resistor has improved the stability of the DC operating point at the cost decreased amplifier gain. A higher gain for AC signals can be restored to some extent by adding capacitor C2across the degeneration resistor RS as shown in figure 4.
Figure 4 C2 added to increase AC gain
Resources:
- LTSpice files: common_source_amp_ltspice
- Fritzing files: common_source_amp_bb
For Further Reading:
http://en.wikipedia.org/wiki/Common_source_amplifier
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university/courses/alm1k/alm-lab-5m.1556876343.txt.gz · Last modified: 03 May 2019 11:39 by Antoniu Miclaus