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To investigate the simple NPN emitter follower amplifier also sometimes referred to as the common collector configuration.
As in all the ALM labs we use the following terminology when referring to the connections to the M1000 connector and configuring the hardware. The green shaded rectangles indicate connections to the M1000 analog I/O connector. The analog I/O channel pins are referred to as CA and CB. When configured to force voltage / measure current -V is added as in CA-V or when configured to force current / measure voltage -I is added as in CA-I. When a channel is configured in the high impedance mode to only measure voltage -H is added as CA-H.
Scope traces are similarly referred to by channel and voltage / current. Such as CA-V, CB-V for the voltage waveforms and CA-I, CB-I for the current waveforms.
ADALM1000 hardware module
Solder-less breadboard
Jumper wires
1 - 2.2KΩ Resistor ( RL )
1 - small signal NPN transistor ( 2N3904 Q1 )
The breadboard connections are shown in figure 1. The output of the channel A voltage generator, CA-V, is connected to the base terminal of Q1. The collector terminal is connected to the positive (+5 V) supply. The emitter terminal is connected to both the 2.2 KΩ load resistor and the channel B scope input CB-H. The other end of the load resistor is connected to ground.
Figure 1 Emitter Follower
The channel A voltage generator should be configured for a 100 Hz Sine wave with 4.6 volt Max and 2.6 V Min. The channel B scope input, CB-H, is used to measure the voltage at the emitter. To measure the input to output error or offset, the CA-V - CB-V Math waveform can be displayed. To measure the input to output gain, the CB-V / CA-V Math waveform can be displayed.
The incremental Gain (Vout / Vin) of the emitter follower should ideally be 1 but will always be slightly less than 1. The gain is generally given by the following equation:
From the equation we can see that in order to obtain a gain close to one we can either increase RL or decrease re. We also know that re is a function of IE and that as IE increases re decreases. Also from the circuit we can see that IE is related to RL and that as RL increases IE decreases. These two effects work counter to each other in the simple resistive loaded emitter follower. Thus to optimize the gain of the follower we need to explore ways to either decrease re or increase RL without effecting the other.
Looking at the follower in another way, because of the inherent DC shift due to the transistor's VBE, the difference between input and output should be constant over the intended swing. Due to the simple resistive load RL, the emitter current IE increases and decreases as the output swings up and down. We know that VBE is a (exponential) function of IE and will change approximately 18 mV (at room temperature) for a factor of 2 change in IE. In this +4V to +2V swing example the minimum IE = 2V / 2.2KΩ or 0.91 mA to a maximum IE = 4V / 2.2KΩ or 1.82mA. This results in about an 18 mV change in VBE. This observation leads us to the first possible improvement in the emitter follower.
The current mirror from activity 5 is now substituted for the emitter load resistor to fix the amplifier transistor emitter current. A current mirror will sink a more or less constant current over a wide range of voltages. This more or less constant current flowing in the transistor will result in a more or less constant VBE. Viewed another way, the very high output resistance of the current source has effectively increased RL while re remains at a low value set by the current.
1 - 1 KΩ Resistor
1 - small signal NPN transistor ( Q1 2N3904)
2 - small signal NPN transistors ( Q2, Q3 SSM2212) selected for best VBE matching
Figure 2 Improved Emitter Follower
An important aspect of the emitter follower is to provide power or current gain. That is to say drive a lower resistance (impedance) load from a higher resistance (impedance) source. Thus it is instructive to measure the emitter follower output impedance.
1 - 2.2 KΩ Resistor
1 - 10 KΩ Resistor
1 - small signal NPN transistor ( Q1 2N3904 )
The circuit configuration shown in figure 3 adds a resistor R2 to inject a test signal from channel A into the emitter (output) of Q1. The input, base of Q1, is tied to the fixed 2.5 V supply rail.
Figure 3 Output impedance test
The channel A generator should be configured for a 100 Hz Sine wave with 2.8 volt Max and a 0.8 volt Min ( +/- 1 volt swing either side of the emitter voltage which should be around 1.8 V). This injects a +/- 0.1mA (1V/10KΩ) current into Q1's emitter. Scope channel B measures the change in voltage seen at the emitter.
Plot the change in voltage measured at the emitter. The nominal emitter current in Q1 is (2.5 - VBE) / 2.2 KΩ. We can calculate the small signal refrom this current as ohms. How does this re compare to the value measured from the test data? Change the value of R1 from 2.2 KΩ to 4.7 KΩ and re-measure the output impedance of the circuit. How has it changed and why?
All the follower circuits we have investigated so far have a built in offset of -VBE. The circuit shown next uses the VBE shift up of a PNP emitter follower to partially cancel the VBE shift down of an NPN emitter follower.
1 - 6.8KΩ Resistor
1 - 10KΩ Resistor
1 - 0.01uF Capacitor
1 - small signal PNP transistor ( Q1 2N3906)
3 - small signal NPN transistors ( Q2, Q3, Q4 2N3904 or SSM2212)
The breadboard connections are shown in figure 4. The output of the channel A generator is connected to the base terminal of PNP transistor Q1. The collector terminal of Q1 is connected to diode connected NPN Q3 which is the input of a current mirror. The emitter terminal is connected to both resistor R1and the base terminal of NPN transistor Q2. Scope channel B is connected to both the emitter of Q2 and the Collector of Q4. The emitters of both Q3 and Q4 are connected to ground. For best matching use the SSM2212 matched NPN pair for Q3 and Q4.
Figure 4 Low offset follower
The channel A generator should be configured for a 100 Hz Sine wave with 3 volt Max and a 2 volt Min. Both Scope vertical ranges are set to 0.5V/Div.
Without C1 and R2 connected, use the CA-V - CB-V Math trace to measure the input to output offset error for this circuit and compare it to the results you saw from the figure 1 and figure 2 circuits.
Now connect C1 and R2 and change the input wave shape of CA-V to a square wave. Measure the rise and fall times of the output signal. Note any differences in the rise and fall times and explain why.
This is a modification of the emitter follower to limit the current output. If the output stage of an amplifier is an emitter follower it may be necessary to limit the maximum current that can be supplied to the output load.
Figure 5 Emitter Current Limit
Where:
The concept in this circuit is that R2 acts as current sense resistor. When the load current times R2, the sense voltage, reaches about 0.6 (for silicon transistors ) Q2 begins to conduct and increases current in R1 which limits the base drive to Q1reducing its output current. The maximum current from the circuit is reached when IL*R2 = 0.6. This circuit can be used to protect amplifiers (including push pull amplifiers.), power supplies and other circuits; or it can be used as a constant current circuit. This is not a precision circuit; however it is a simple and effective circuit.
For Further Reading:
http://en.wikipedia.org/wiki/Common_collector
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