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resources:tools-software:uc-drivers:renesas:adf4118_rx62n [02 Feb 2012 16:03] – Approved Dragos Bogdanresources:tools-software:uc-drivers:renesas:adf4118_rx62n [02 Feb 2012 17:09] – Approved Dragos Bogdan
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 The Renesas Demonstration Kit (RDK) for RX62N is an evaluation and demonstration tool for Renesas RX62N microcontrollers. The goal is to provide the user with a powerful debug and demonstration platform targeted at common applications. The board also provides a useful platform for evaluating the Renesas suite of development tools for coding and debugging, using the High-performance Embedded Workshop (HEW) IDE as well as programming the device using the on-board SEGGER J-Link JTAG debugger. The Renesas Demonstration Kit (RDK) for RX62N is an evaluation and demonstration tool for Renesas RX62N microcontrollers. The goal is to provide the user with a powerful debug and demonstration platform targeted at common applications. The board also provides a useful platform for evaluating the Renesas suite of development tools for coding and debugging, using the High-performance Embedded Workshop (HEW) IDE as well as programming the device using the on-board SEGGER J-Link JTAG debugger.
  
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-The Renesas Demonstration Kit (RDK) for RX62N +
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 The [[adi>ADF4118]] is frequency synthesizer which can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (5-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N= BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator). The [[adi>ADF4118]] is frequency synthesizer which can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (5-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N= BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).
resources/tools-software/uc-drivers/renesas/adf4118_rx62n.txt · Last modified: 25 Jan 2021 05:24 by Robin Getz

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