The AD5684/AD5686, members of the nanoDAC+™ family are low power, quad, 12/16-bit buffered voltage output DACs. The devices include a gain select pin giving a full-scale output of 0V to VREF (gain = 1) or 0V to 2VREF (gain = 2).
The AD5684R/AD5685R/AD5686R nanoDAC+TM are quad, 12/14/16-bit, rail-to-rail, voltage output DACs. The devices include a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2).
These devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design and exhibit less than 0.1% FSR gain error and 1.5mV offset error performance. The devices are available in a 3mm X 3mm LFCSP and a TSSOP package.
The AD5684/AD5686/AD5684R/AD5685R/AD5686R also incorporate a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 µA at 3 V while in power-down mode. The devices employ a versatile SPI interface that operates at clock rates up to 50 MHz, and all devices contain a VLOGIC pin intended for 1.8 V/3 V/5 V logic.
The goal of this project (Microcontroller No-OS) is to be able to provide reference projects for lower end processors, which can't run Linux, or aren't running a specific operating system, to help those customers using microcontrollers with ADI parts. Here you can find a generic driver which can be used as a base for any microcontroller platform and also specific drivers for Renesas platforms.
The driver contains two parts:
The Communication Driver has a standard interface, so the AD5684R driver can be used exactly as it is provided.
There are three functions which are called by the AD5684R driver:
SPI driver architecture
The following functions are implemented in this version of AD5684R driver:
|unsigned char AD568X_Init(unsigned char ad568x)||Initializes the device.|
|void AD568X_Reset(unsigned char resetOutput)||Resets the device(clears the outputs to either zero scale or midscale).|
|void AD568X_PowerMode(unsigned char channel, unsigned char pwrMode)||Puts the device in a specific power mode.|
|void AD568X_InternalVoltageReference(unsigned char vRefMode)||Select internal or external voltage reference.|
|void AD568X_SetInputRegister(unsigned long registerValue)||Writes a 24-bit data-word to the Input Register of the device.|
|void AD568X_WriteFunction(unsigned char writeCommand, unsigned char channel, unsigned short data)||Write data to the Input Register or to DAC Register of a channel.|
|unsigned short AD568X_ReadBack(unsigned char dacChannelAddr)||Reads back the binary value written to one of the channels.|
|float AD568X_SetVoltage(unsigned char channel, float outputVoltage, float vRef)||Selects the output voltage of the selected channel.|
This section contains a description of the steps required to run the AD5684R demonstration project on a Renesas RL78G13 platform.
An EVAL-AD5684RSDZ has to be interfaced with the Renesas Demonstration Kit (RDK) for RL78G13:
EVAL-AD5684RSDZ Pin SYNC2 → YRDKRL78G13 J11 connector Pin 1 EVAL-AD5684RSDZ Pin DIN → YRDKRL78G13 J11 connector Pin 2 EVAL-AD5684RSDZ Pin DOUT → YRDKRL78G13 J11 connector Pin 3 EVAL-AD5684RSDZ Pin SCLK → YRDKRL78G13 J11 connector Pin 4 EVAL-AD5684RSDZ Pin GND → YRDKRL78G13 J11 connector Pin 5 EVAL-AD5684RSDZ Pin LDAC → YRDKRL78G13 J11 connector Pin 9 EVAL-AD5684RSDZ Pin RESET → YRDKRL78G13 J11 connector Pin 10
The reference project:
This section presents the steps for developing a software application that will run on the Renesas Demo Kit for RL78G13 for controlling and monitoring the operation of the ADI part.