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This version (08 Apr 2021 16:46) was approved by Darius B.The Previously approved version (08 Apr 2021 16:41) is available.Diff

Table of Contents

AD7746 - Microcontroller No-OS Driver

Supported Devices

Evaluation Boards

Overview

The AD7745/AD7746 are a high resolution, Σ-Δ capacitance-to-digital converter (CDC). The capacitance to be measured is connected directly to the device inputs. The architecture fea-tures inherent high resolution (24-bit no missing codes, up to 21-bit effective resolution), high linearity (±0.01%), and high accuracy (±4 fF factory calibrated). The AD7745/AD7746 capacitance input range is ±4 pF (changing), while it can accept up to 17 pF common-mode capacitance (not changing), which can be balanced by a programmable on-chip, digital-to-capacitance converter (CAPDAC).

The AD7745 has one capacitance input channel, while the AD7746 has two channels. Each channel can be configured as single-ended or differential. The AD7745/AD7746 are designed for floating capacitive sensors. For capacitive sensors with one plate connected to ground, the AD7747 is recommended.

The parts have an on-chip temperature sensor with a resolution of 0.1°C and accuracy of ±2°C. The on-chip voltage reference and the on-chip clock generator eliminate the need for any external components in capacitive sensor applications. The parts have a standard voltage input, which together with the differential reference input allows easy interface to an external temperature sensor, such as an RTD, thermistor, or diode.

The AD7745/AD7746 have a 2-wire, I2C-compatible serial interface. Both parts can operate with a single power supply from 2.7 V to 5.25 V. They are specified over the automotive temperature range of –40°C to +125°C and are housed in a 16-lead TSSOP package.

Applications

Automotive, Industrial and Medical Systems for:

  • Pressure Measurement
  • Position Sensors
  • Level Sensors
  • Flowmeters
  • Humidity Sensors
  • Impurity Detection

Hardware setup

The board has a USB port that is by default used to power the board. To power the converter chip, depending on your controller logic level, you need to install a jumper in either the 3.3V or 5V positions of AVDD select header LK1.

3.3V AVDD:

5V AVDD:

Once you've verified that the chip is powered correctly by measuring the AVDD-GND test points, you may proceed to connecting the SDA and SCL lines to your controller. Male pin headers are available at LK2.8 and LK2.6 respectively.

Building the project

Go to the no-OS/projects/ad7746-ebz directory and follow the build instructions below.

NO-OS Project Build Guide

NOTE: This build guide is valid for the projects found in the no-OS/projects folder. If your project resides elsewhere under the no-OS repository tree, it is a legacy project. A build guide for legacy projects can be found Build no-OS with GNU make.

Clone NO-OS with the --recursive flag: 

git clone --recursive https://github.com/analogdevicesinc/no-OS

If however you've already cloned NO-OS without the --recursive flag, you may initialize all the submodules in an existing NO-OS clone with: 

git submodule update --recursive --init

Build Prerequisites

Prior to building a no-OS project, it is required to set up some environment variables so that the build process may find the necessary tools (compiler, linker, SDK etc.).

Use the following commands to prepare your environment for building no-OS projects:

Linux (Click to expand)

Linux (Click to expand)

Intel (Click to expand)

Intel (Click to expand)

Assuming the SDK is installed at this path: 

/path/to/intel
└── intelFPGA
    └── 18.1

Run: 

$ source no-OS/tools/scripts/platform/intel/environment.sh /path/to/intel/intelFPGA 18.1

Xilinx (Click to expand)

Xilinx (Click to expand)

Assuming the Vitis is installed at this path: 

/path/to/xilinx
├── DocNav
├── Downloads
├── SDK
│   └── 2019.1
└── Vitis
    └── 2021.1

When using no-OS master branch, run: 

$ source /path/to/xilinx/Vitis/2021.1/settings64.sh

When using no-OS 2019_R2 branch, run: 

$ source /path/to/xilinx/SDK/2019.1/settings64.sh

For more information, consult the support/answers/47821.html.

STM32 (Click to expand)

STM32 (Click to expand)

  • Install stm32cubeide to default location /opt/stm32cubeide. If you'd rather install it at a different location, run export STM32CUBEIDE=/path/to/your/stm32cubeide in the terminal used for building.
  • Install stm32cubemx to default location /opt/stm32cubemx. If you'd rather install it at a different location, run export STM32CUBEMX=/path/to/your/stm32cubemx in the terminal used for building.
  • Install java (openjdk-11), sed and head (if not already present, they normally are).

Maxim (Click to expand)

Maxim (Click to expand)

  • Install the Maxim Micros SDK.
  • Set the MAXIM_LIBRARIES environment variable to the MaximSDK/Libraries path (the default should be ~/MaximSDK/Libraries).
  • For visual debugging and building, install Visual Studio Code, and the Cortex-Debug extension.

ADuCM3029 (Click to expand)

ADuCM3029 (Click to expand)

Please install all the necessary packs locally and then manually import them in CrossCore

Common Issues with environment setup:

  • Makefiles searches for the CCES_HOME in its default installation directory. It may happen that multiple version are installed and may not work. To select a CCES_HOME run export CCES_HOME=/opt/analog/cces/2.10.0

Windows (Click to expand)

Windows (Click to expand)

Use cmd or PowerShell. Cygwin is not supported.

Intel (Click to expand)

Intel (Click to expand)

Assuming the SDK is installed at this path: 

C:\
└── intelFPGA
    └── 18.1

Run: 

> .\no-OS\tools\scripts\platform\altera\environment.bat C:\intelFpga 18.1

Xilinx (Click to expand)

Xilinx (Click to expand)

Assuming the Vitis is installed at this path: 

C:\Xilinx
├── DocNav
├── Downloads
├── SDK
│   └── 2019.1
└── Vitis
    └── 2021.1

When using no-OS master branch, run: 

> C:\Xilinx\Vitis\2021.1\settings64.bat

When using no-OS 2019_R2 branch, run: 

> C:\Xilinx\SDK\2019.1\settings64.bat

For more information, consult the Xilinx support support/answers/47821.html.

Note that Xilinx SDK versions 2018.3 or earlier don't properly set up the Windows PATH so that you may use make command provided with the SDK from the shell.

If this is the case, please manually add the following to your Windows PATH or install make for Windows of your choice: 

C:\Xilinx\SDK\2018.3\gnuwin\bin

Maxim (Click to expand)

Maxim (Click to expand)

  • Install the Maxim Micros SDK.
  • Set the MAXIM_LIBRARIES environment variable to the MaximSDK\Libraries path (the default should be C:\MaximSDK\Libraries).
  • For visual debugging and building, install Visual Studio Code, and the Cortex-Debug extension.

ADuCM3029 (Click to expand)

ADuCM3029 (Click to expand)

Please install all the necessary packs locally and then manually import them in CrossCore

Common Issues with environment setup:

  • Makefiles searches for the CCES_HOME in its default installation directory. It may happen that multiple version are installed and may not work. To select a CCES_HOME run set CCES_HOME=c:\Analog Devices\CrossCore Embedded Studio 2.10.0
If using PowerShell instead of cmd, open another shell instance after running the above scripts.

Building a project

Go in the project directory that should be built.

Linux (Click to expand)

Linux (Click to expand) 

$ cd no-OS/projects/project_name/
$ tree
.
├── builds.json
├── Makefile
├── src
└── src.mk

Intel (Click to expand)

Intel (Click to expand)

Copy the .sof and .sopcinfo to the project folder. 

$ ls
Makefile  profiles  src  src.mk  system_bd.sopcinfo  adrv9009_a10gx.sof	
$ make

# Alternatively you may select a .sopcinfo file explicitly by:
$ make HARDWARE=path/to/system_bd.sopcinfo

Xilinx (Click to expand)

Xilinx (Click to expand)

Copy the .hdf in the project folder. 

$ ls
Makefile  profiles  src  src.mk system_top.hdf
$ make

# Alternatively you may select an .hdf file explicitly by:
$ make HARDWARE=path/to/file.hdf

Maxim (Click to expand)

Maxim (Click to expand)

To build a project, type: 

make PLATFORM=maxim TARGET=...

The TARGET specifies the chip for which the project is built. If it is missing, max32660 will be used. At the moment, the available targets are: max32650, max32655 and max32660.

STM32 (Click to expand)

STM32 (Click to expand)

Make sure you have the .ioc file in the project directory, then type: 

$ make

ADuCM3029 (Click to expand)

ADuCM3029 (Click to expand)

The ADuCM3029 projects also contain a pinmux_config.c file which contains pin configuration instructions. 

# build an ADuCM3029-only project
$ make

# if the platform autodetection picks the wrong platform, explicitly specify the PLATFORM
$ make PLATFORM=aducm3029

Windows (Click to expand)

Windows (Click to expand)

CMD needs to be run with administrative privileges to create a project.

If this is not possible, check the standalone section. 

> cd .\no-OS\projects\project_name\

It should contain make-related files and source files: 

.\no-OS\projects\project_name\
├── builds.json
├── Makefile
├── src
└── src.mk

Intel (Click to expand)

Intel (Click to expand)

Copy the .sof and .sopcinfo to the project folder and run: 

.\no-OS\projects\adrv9009\
├── Makefile
├── profiles
├── src
├── src.mk
├── system_bd.sopcinfo
└── adrv9009_a10gx.sof

> make

Xilinx (Click to expand)

Xilinx (Click to expand)

Copy the .hdf to the project folder and run: 

.\no-OS\projects\adrv9009\
├── Makefile
├── profiles
├── src
├── src.mk
└── system_top.hdf

> make

Maxim (Click to expand)

Maxim (Click to expand)

To build a project, type: 

make PLATFORM=maxim TARGET=...

The TARGET specifies the chip for which the project is built. If it is missing, max32660 will be used. At the moment, the available targets are: max32650, max32655 and max32660.

ADuCM3029 (Click to expand)

ADuCM3029 (Click to expand)

The ADuCM3029 projects also contain a pinmux_config.c file which contains pin configuration instructions. 

# build an ADuCM3029-only project
> make

# if the platform autodetection picks the wrong platform, explicitly specify the PLATFORM
> make PLATFORM=aducm3029

The build process creates a build directory in the project folder: 

build
├── app
├── bsp
├── obj
├── release.elf
└── tmp

Running/Debugging

Once the .elf or .hex file has been generated, make sure the board is powered on, JTAG cable connected and use the following commands to upload the program to the board or debug.

Uploading the binary to target is generically achieved with: 

$ make run

Use the following command to launch the SDK associated to the used platform in order to be able to debug graphically by clicking the debug button: 

$ make sdkopen

Fore more details about the available make rules, check out this page.

17 Mar 2021 10:27 · Darius B

Capacitive length sensor demo

The demo application uses the stdout/stin over UART for user interaction. Thus you need to set up a serial terminal with the UART_BAUDRATE specified in the src/app/parameters.h file.

Connect the serial terminal, run make run from the project folder and you should see the following demo application that you can interact with by hitting ENTER on the keyboard and by following the instructions: 

[INIT] AD7746 initialization ok.
[CALIB] 1. Remove the ruler and press ENTER. 
[CALIB] 2. Place ruler to 51mm (2inch) and press ENTER.
[DEMO] Move the ruler around, its position will is read and displayed every 2 seconds.
Position: 51 mm, Temperature: 23 *C
Position: 50 mm, Temperature: 23 *C
Position: 67 mm, Temperature: 23 *C
Position: 67 mm, Temperature: 23 *C
Position: 67 mm, Temperature: 23 *C
Position: 67 mm, Temperature: 23 *C
Position: 67 mm, Temperature: 23 *C
Position: 47 mm, Temperature: 23 *C
Position: 37 mm, Temperature: 23 *C
Position: 34 mm, Temperature: 23 *C
Position: 34 mm, Temperature: 23 *C
Position: 27 mm, Temperature: 23 *C
Position: 27 mm, Temperature: 23 *C

Legacy driver

A legacy version of this driver and instructions for a Renesas microcontroller may be found at this link.

resources/tools-software/uc-drivers/ad7746.txt · Last modified: 08 Apr 2021 16:46 by Darius B

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