This version (04 Jan 2021 06:40) was approved by Sanjeeva Reddy.The Previously approved version (11 Aug 2020 13:44) is available.Diff

Pitch Transposer (Data Controlled)

Click here to return to the Pitch Modification page

This algorithm shifts the frequency of an incoming signal. The frequency shift is “voltage-controlled”, meaning that there is an input pin that controls the pitch shift amount based on its value. See Pitch Transposer page for GUI/RAM controlled version.pitchtranposedata.jpg

Input Pins

NameFormat [int/dec] - [control/audio]Function Description
Pin 0: Inputany - anyInput signal that will have its frequency shifted
Pin 1: InputeitherFrequency shift amount (percentage/sampling-rate)

Output Pins

NameFormat [int/dec] - [control/audio]Function Description
Pin 0: Outputany - anyOutputs the processed signal

GUI Controls

GUI Control NameDefault ValueRangeFunction Description
Delay Reserved300[2.0:Max Data RAM Available]This control sets the number of samples of audio delay that are reserved in memory as a buffer used for the pitch shifting algorithm. Smaller delay buffers result in more discontinuities in the pitch shifted output signal, which causes some harmonic distortion. Setting this delay buffer to a very large size will result in less distortion, but at the cost of increased delay memory usage.

Context Menu

Right-click on the module to open the context menu window. By default, DM1 memory is used for delay. User can choose either DM0,DM1 or PM for Delay. Change in memory used for delay leads to re-compile the project(supports for ADAU145x/ADAU146x).

Algorithm Description

The algorithm takes an input signal and shifts it in frequency up or down depending on the value of the the frequency shift control signal. The control input value should be the shift percentage divided by the sampling rate, for example for a shift of +100%: control signal = (100 / 48000) = 0.0020833 (fixed-point)

Here is a time-domain display of a sine tone being shifted in frequency. The top sine tone is the input signal, and the bottom sine tone is the output.

Approximate Output frequency = Input frequency + (Input frequency * (Delay Reserved x 0.001) x shift(%))

For example, consider the following schematic,

Shift = 0.38 (38%)
Input frequency = 100 Hz
Delay Reserved = 960

control signal = 38/48000 ⇒ 0.000791667
Approximate Output frequency = 100 + (100 * (960 x 0.001) x 0.38) = 136.48

Here is the same example in the frequency domain. This picture shows the frequency domain of the input signal.

This picture shows the frequency domain of the output signal.

Algorithm Details

Toolbox PathADI Algorithms/Pitch Modification
Cores SupportedAD194x
“Grow Algorithm” Supportedno
“Add Algorithm” Supportedno
Subroutine/Loop Basedno
Program RAM76
Data RAM1019
Parameter RAM4
resources/tools-software/sigmastudio/toolbox/adialgorithms/pitchmodification/pitchtransposerdatacontrolled.txt · Last modified: 04 Jan 2021 06:40 by Sanjeeva Reddy