This version (14 Nov 2012 21:12) was approved by William Jahn.The Previously approved version (14 Nov 2012 21:08) is available.
SigmaDSP Architecture (AD1941)
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The basic AD1940 Sigma DSP architecture comprises these components:
- Program RAM stores functionality and execution information, meaning it dictates the signal flow and chain of operations (+, -, x, /, etc.) that are entered for execution.
- Parameter RAM and Data Memory. Parameter RAM stores parameter information (either from you or the result of a core operation). The data memory stores serial information, usually audio samples or the result of core operations.
- Safeload registers help load parameters smoothly.
- Target Slew Ram are registers that help update parameters smoothly.
- Depending on the processor there are also additional registers: data capture; DSP core control; and serial input and output control.
This section of the helpfile contains a general summary of AD1940 features and microcontroller considerations. For details concerning these subjects beyond what is in the individual help topics, refer to the ADI website, navigating to your part's datasheet at www.analog.com/sigmadsp.
resources/tools-software/sigmastudio/sigmadsparchitecture/ad1940.txt · Last modified: 14 Nov 2012 21:12 by William Jahn