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resources:tools-software:linux-drivers:iio-resolver:ad2s1210 [16 Nov 2012 13:47] – [Reference Circuit] Lars-Peter Clausen | resources:tools-software:linux-drivers:iio-resolver:ad2s1210 [07 Dec 2023 15:44] (current) – added setup images Trevor Gamblin | ||
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===== Evaluation Boards ===== | ===== Evaluation Boards ===== | ||
- | * [[adi> | + | * [[adi> |
===== Reference Circuits ===== | ===== Reference Circuits ===== | ||
* [[adi> | * [[adi> | ||
+ | * [[adi> | ||
+ | * [[adi> | ||
===== Description ===== | ===== Description ===== | ||
- | {{scrape> | + | |
* [[adi> | * [[adi> | ||
- | * {{scrape> | ||
This is a Linux industrial I/O ([[software: | This is a Linux industrial I/O ([[software: | ||
Line 27: | Line 28: | ||
===== Status ===== | ===== Status ===== | ||
- | ^ Source | + | ^ Source ^ Mainlined? ^ |
- | | [[git.linux.org>drivers/staging/ | + | | [[https://git.kernel.org/pub/ |
+ | |||
+ | Support for the AD2S1210 is in mainline for kernel v6.7 and is backported to v6.1 of the [[repo> | ||
===== Files ===== | ===== Files ===== | ||
^ Function ^ File ^ | ^ Function ^ File ^ | ||
- | | driver | + | | driver |
- | | include| [[staging.kernel.org>drivers/staging/ | + | | devicetree |
====== Adding Linux driver support ====== | ====== Adding Linux driver support ====== | ||
Line 40: | Line 44: | ||
"make qconfig" | "make qconfig" | ||
- | <note> | + | <WRAP round help> |
The Driver depends on **CONFIG_SPI** | The Driver depends on **CONFIG_SPI** | ||
- | </note> | + | </WRAP> |
< | < | ||
Line 65: | Line 69: | ||
====== Driver Usage ====== | ====== Driver Usage ====== | ||
- | The device | + | To configure the chip, use the attributes according to the device register to IIO ABI mapping below: |
- | <code> | + | |
- | / | + | ^ Register |
- | </code> | + | |DOS Overrange Threshold |
+ | |DOS Mismatch Threshold | ||
+ | |DOS Reset Maximum Threshold | 0x8B | events/ | ||
+ | |DOS Reset Minimum Threshold | 0x8C | events/ | ||
+ | |LOT High Threshold | ||
+ | |LOT Low Threshold | ||
+ | |Excitation Frequency | ||
+ | |Control | ||
+ | | Phase lock range | D5 | events/ | ||
+ | | Hysteresis | ||
+ | | Encoder resolution | ||
+ | | Resolution | ||
+ | |Soft Reset | 0xF0 | | | Soft reset is performed when `out_altvoltage0_frequency` is written.| | ||
+ | |Fault | ||
+ | |||
+ | ===== Interfacing With the AD2S1210 via iio_attr ===== | ||
+ | |||
+ | Accessing a list of channels: | ||
+ | |||
+ | <WRAP box bggreen><wrap info> | ||
+ | < | ||
+ | analog@setup-2-zed: | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | </ | ||
+ | |||
+ | For example, to get position channel **angl0**: | ||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | analog@setup-2-zed: | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | </ | ||
+ | |||
+ | Or velocity channel **anglvel0**: | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | analog@setup-2-zed: | ||
+ | dev ' | ||
+ | dev ' | ||
+ | dev ' | ||
+ | </ | ||
+ | |||
+ | ===== Interfacing With the AD2S1210 via /sys/bus ===== | ||
+ | |||
+ | Alternatively, | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | analog@setup-2-zed: | ||
+ | |||
+ | analog@setup-2-zed:/ | ||
+ | . | ||
+ | ├── buffer | ||
+ | │ ├── data_available | ||
+ | │ ├── direction | ||
+ | │ ├── enable | ||
+ | │ ├── length | ||
+ | │ └── watermark | ||
+ | ├── buffer0 | ||
+ | │ ├── data_available | ||
+ | │ ├── direction | ||
+ | │ ├── enable | ||
+ | │ ├── in_angl0_en | ||
+ | │ ├── in_angl0_index | ||
+ | │ ├── in_angl0_type | ||
+ | │ ├── in_anglvel0_en | ||
+ | │ ├── in_anglvel0_index | ||
+ | │ ├── in_anglvel0_type | ||
+ | │ ├── in_timestamp_en | ||
+ | │ ├── in_timestamp_index | ||
+ | │ ├── in_timestamp_type | ||
+ | │ ├── length | ||
+ | │ └── watermark | ||
+ | ├── current_timestamp_clock | ||
+ | ├── dev | ||
+ | ├── events | ||
+ | │ ├── in_altvoltage0_mag_rising_label | ||
+ | │ ├── in_altvoltage0_mag_rising_reset_max | ||
+ | │ ├── in_altvoltage0_mag_rising_reset_max_available | ||
+ | │ ├── in_altvoltage0_mag_rising_reset_min | ||
+ | │ ├── in_altvoltage0_mag_rising_reset_min_available | ||
+ | │ ├── in_altvoltage0_mag_rising_value | ||
+ | │ ├── in_altvoltage0_mag_rising_value_available | ||
+ | │ ├── in_altvoltage0_thresh_falling_label | ||
+ | │ ├── in_altvoltage0_thresh_falling_value | ||
+ | │ ├── in_altvoltage0_thresh_falling_value_available | ||
+ | │ ├── in_altvoltage0_thresh_rising_label | ||
+ | │ ├── in_altvoltage0_thresh_rising_value | ||
+ | │ ├── in_altvoltage0_thresh_rising_value_available | ||
+ | │ ├── in_altvoltage1_mag_either_label | ||
+ | │ ├── in_altvoltage2_mag_either_label | ||
+ | │ ├── in_angl1_thresh_rising_hysteresis | ||
+ | │ ├── in_angl1_thresh_rising_hysteresis_available | ||
+ | │ ├── in_angl1_thresh_rising_label | ||
+ | │ ├── in_angl1_thresh_rising_value | ||
+ | │ ├── in_angl1_thresh_rising_value_available | ||
+ | │ ├── in_anglvel0_mag_rising_label | ||
+ | │ ├── in_phase0_mag_rising_label | ||
+ | │ ├── in_phase0_mag_rising_value | ||
+ | │ └── in_phase0_mag_rising_value_available | ||
+ | ├── in_altvoltage0_label | ||
+ | ├── in_altvoltage1_label | ||
+ | ├── in_altvoltage2_label | ||
+ | ├── in_angl0_hysteresis | ||
+ | ├── in_angl0_hysteresis_available | ||
+ | ├── in_angl0_label | ||
+ | ├── in_angl0_raw | ||
+ | ├── in_angl0_scale | ||
+ | ├── in_angl1_label | ||
+ | ├── in_anglvel0_label | ||
+ | ├── in_anglvel0_raw | ||
+ | ├── in_anglvel0_scale | ||
+ | ├── in_phase0_label | ||
+ | ├── name | ||
+ | ├── of_node -> ../ | ||
+ | ├── out_altvoltage0_frequency | ||
+ | ├── out_altvoltage0_frequency_available | ||
+ | ├── out_altvoltage0_label | ||
+ | ├── power | ||
+ | │ ├── autosuspend_delay_ms | ||
+ | │ ├── control | ||
+ | │ ├── runtime_active_time | ||
+ | │ ├── runtime_status | ||
+ | │ └── runtime_suspended_time | ||
+ | ├── scan_elements | ||
+ | │ ├── in_angl0_en | ||
+ | │ ├── in_angl0_index | ||
+ | │ ├── in_angl0_type | ||
+ | │ ├── in_anglvel0_en | ||
+ | │ ├── in_anglvel0_index | ||
+ | │ ├── in_anglvel0_type | ||
+ | │ ├── in_timestamp_en | ||
+ | │ ├── in_timestamp_index | ||
+ | │ └── in_timestamp_type | ||
+ | ├── subsystem -> ../ | ||
+ | ├── trigger | ||
+ | │ └── current_trigger | ||
+ | ├── uevent | ||
+ | └── waiting_for_supplier | ||
+ | |||
+ | analog@setup-2-zed:/ | ||
+ | ad2s1210 | ||
+ | |||
+ | analog@setup-2-zed:/ | ||
+ | 34115 | ||
+ | </ | ||
+ | |||
+ | Hysteresis can be enabled or disabled this way. To do so, first check the output of in_angl0_hysteresis_available: | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | root@setup-2-zed:/ | ||
+ | 0 1 | ||
+ | </xterm></ | ||
+ | |||
+ | To turn hysteresis off, write the first value from the output to in_angl0_hysteresis: | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | root@setup-2-zed:/ | ||
+ | </ | ||
+ | |||
+ | To turn it on, write the second value (which is dependent on the assigned bits for resolution and may not always be 1): | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | root@setup-2-zed:/ | ||
+ | </ | ||
+ | |||
+ | ===== Triggered buffer ===== | ||
+ | |||
+ | To generate samples using the triggered buffer, you will need a trigger. You can create an hrtimer trigger and test it by retrieving samples like this: | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | root@setup-2-zed: | ||
+ | root@setup-2-zed: | ||
+ | WARNING: High-speed mode not enabled | ||
+ | 00000000 | ||
+ | 00000010 | ||
+ | 00000020 | ||
+ | 00000030 | ||
+ | 00000040 | ||
+ | 00000050 | ||
+ | 00000060 | ||
+ | 00000070 | ||
+ | 00000080 | ||
+ | 00000090 | ||
+ | 000000a0 | ||
+ | 000000b0 | ||
+ | 000000c0 | ||
+ | 000000d0 | ||
+ | 000000e0 | ||
+ | 000000f0 | ||
+ | ... | ||
+ | </ | ||
+ | |||
+ | <note important> | ||
+ | |||
+ | For other apps, we probably want a high sample rate. You can change the rate like this: | ||
+ | |||
+ | <WRAP box bggreen>< | ||
+ | < | ||
+ | root@setup-2-zed: | ||
+ | 10000.000000 | ||
+ | </ | ||
+ | |||
+ | ===== Reading IIO Events ===== | ||
+ | |||
+ | See [[https:// | ||
+ | |||
+ | Fault to event mapping: | ||
+ | |||
+ | ^ Fault | ||
+ | |Sine/ | ||
+ | |Sine/ | ||
+ | |Sine/ | ||
+ | |Sine/ | ||
+ | |Tracking error exceeds LOT | D3 | angl1 | thresh | rising | | | ||
+ | |Velocity exceeds maximum tracking rate | D2 | anglvel0 | ||
+ | |Phase error exceeds phase lock range | D1 | phase0 | ||
+ | |Configuration parity error | D0 | *writes to kernel log* | | | ||
+ | |||
+ | ====== Usage With the EVAL-AD2S1210SDZ Evaluation Board ====== | ||
+ | |||
+ | ===== Interfacing With a Raspberry Pi ===== | ||
+ | |||
+ | ==== Wiring ==== | ||
+ | |||
+ | ^ AD2S1210 Pin ^ Eval Board Pin ^ RPi Header Pin ^ RPi Function ^ Notes ^ | ||
+ | | RES0 | LK6 | 15 | GPIO22 | There aren’t J4 pins for RES0/1 so have to use jumper pins. It is also possible to hard-wire resolution pins RES0/1, but device tree would need to be changed accordingly. | | ||
+ | | RES1 | LK7 | 16 | GPIO23 | There aren’t J4 pins for RES0/1 so have to use jumper pins. It is also possible to hard-wire resolution pins RES0/1, but device tree would need to be changed accordingly. | | ||
+ | | A0 | J4-12 | 18 | GPIO24 | | ||
+ | | A1 | J4-11 | 22 | GPIO25 | | ||
+ | | WR/FSYNC | J4-4 | 24 | SPI0 CE0 | | ||
+ | | SAMPLE | J4-1 | 12 | GPIO18 | | ||
+ | | VDRIVE | J704-1 | 1 | 3.3V | | ||
+ | | DGND | J704-2 | 9 | GND | | ||
+ | | SCLK | J4-10 | 23 | SPI0 SCLK | | ||
+ | | SDI | J4-9 | 19 | SPI0 MOSI | | ||
+ | | SDO | J4-8 | 21 | SPI0 MISO | | ||
+ | |||
+ | ^ AD2S1210 Pin ^ Eval Board Pins (Jumpered) ^ Eval Board Signal ^ | ||
+ | | RD | J4-3, J4-7 | VDRIVE | | ||
+ | | CS | J4-2, J4-6 | DGND | | ||
+ | |||
+ | ^ Eval Board Signal ^ Eval Board Jumper ^ Position ^ Notes ^ | ||
+ | | SAMPLE | LK1 | B | | | ||
+ | | CS | LK2 | C | | | ||
+ | | RD | LK3 | C | | | ||
+ | | A0 | LK 4 | C | | | ||
+ | | A1 | LK5 | C | | | ||
+ | | RES0 | LK6 | C | There aren’t J4 pins for RES0/1 so have to use jumper pins. It is also possible to hard-wire resolution pins RES0/1, but device tree would need to be changed accordingly. | | ||
+ | | RES1 | LK7 | C | There aren’t J4 pins for RES0/1 so have to use jumper pins. It is also possible to hard-wire resolution pins RES0/1, but device tree would need to be changed accordingly. | | ||
+ | | SOE | LK9 | B | | | ||
+ | | VDRIVE | LK703 | B | | | ||
+ | |||
+ | ==== Device Tree ==== | ||
+ | |||
+ | Add '' | ||
+ | |||
+ | Overlay: [[https:// | ||
+ | |||
+ | ==== Sample Images ==== | ||
+ | |||
+ | Eval board connections: | ||
+ | |||
+ | {{: | ||
+ | |||
+ | Raspberry Pi connections: | ||
+ | |||
+ | {{: | ||
+ | |||
+ | ===== Zedboard ===== | ||
+ | |||
+ | {{: | ||
- | There are two files: | + | See [[:resources: |
- | ^ File Name ^ Permission | + | |
- | | raw_io | read/write | raw SPI read/write | | + | |
- | | reset | write only | soft reset | | + | |
- | | fclkin | read/write | show/store input clock | | + | |
- | | fexcit | read/write | show/store excitation clock | | + | |
- | | control | read/write | show/store control register | | + | |
- | | bits | read/write | show/store resolution | | + | |
- | | fault | read only | show fault register | + | |
- | | pos | read only | 10/12/14/16 bits unsigned angular value | | + | |
- | | vel | read only | 10/12/14/16 bits signed velocity value | | + | |
- | | pos_vel | read only | 10/12/14/16 bits unsigned angular and signed velocity value | | + | |
- | | los_thrd | read/write | show/store los threshold register | | + | |
- | | dos_ovr_thrd | read/write | show/store dos overange register | | + | |
- | | dos_mis_thrd | read/write | show/store dos mismatch register | | + | |
- | | dos_rst_max_thrd | read/write | show/store dos reset maximum register | | + | |
- | | dos_rst_min_thrd | read/write | show/store dos reset minimum register | | + | |
- | | lot_high_thrd | read/write | show/store lot high threshold | | + | |
- | | lot_low_thrd | read/write | show/store lot low threshold | | + | |
- | | description | read only | description about this chip | | + | |
====== More Information ====== | ====== More Information ====== | ||
{{page> | {{page> |