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resources:tools-software:linux-drivers:iio-pll:ad9523 [04 May 2012 17:16] – [Evaluation Boards] Michael Hennerichresources:tools-software:linux-drivers:iio-pll:ad9523 [11 Feb 2016 20:58] (current) – [Datasheets] Lars-Peter Clausen
Line 8: Line 8:
 ===== Evaluation Boards ===== ===== Evaluation Boards =====
  
-  * [[adi>AD9523-1/PCBZ]]+  * [[adi>EVAL-AD9523-1|AD9523-1/PCBZ]]
  
-{{scrape>adi>AD9523-1#product_title}} 
-  * [[adi>AD9523-1|Product Page]] 
-  * {{scrape>adi>AD9523-1#datasheet_pdf_dspart}} 
  
 ===== Description ===== ===== Description =====
Line 24: Line 21:
 ===== Status ===== ===== Status =====
  
- Source   Mainlined?  +^ Source ^ Mainlined? ^ 
-| [[git.linux.org>drivers/staging/iio/frequency/ad9523.c|git]] |  [[git.linux.org>drivers/staging/iio/frequency/ad9523.c|In Progress]]  |+| [[git.linux.org>drivers/iio/frequency/ad9523.c|git]] | [[git.linux.org>drivers/iio/frequency/ad9523.c|Yes]] |
 ===== Files ===== ===== Files =====
  
 ^ Function ^ File ^ ^ Function ^ File ^
-| driver  | [[git.linux.org>drivers/staging/iio/frequency/ad9523.c]] | +| driver  | [[git.linux.org>drivers/iio/frequency/ad9523.c]] | 
-| include | [[git.linux.org>drivers/staging/iio/frequency/ad9523.h]] | +| include | [[git.linux.org>include/linux/iio/frequency/ad9523.h]] | 
-| Documentation | [[git.linux.org>drivers/staging/iio/Documentation/frequency/sysfs-bus-iio-ad9523]] |+| Documentation | [[git.linux.org>Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523]] |
  
 ====== Example platform device initialization ====== ====== Example platform device initialization ======
Line 40: Line 37:
  
 <code c> <code c>
 +/**
 + * struct ad9523_channel_spec - Output channel configuration
 + *
 + * @channel_num: Output channel number.
 + * @divider_output_invert_en: Invert the polarity of the output clock.
 + * @sync_ignore_en: Ignore chip-level SYNC signal.
 + * @low_power_mode_en: Reduce power used in the differential output modes.
 + * @use_alt_clock_src: Channel divider uses alternative clk source.
 + * @output_dis: Disables, powers down the entire channel.
 + * @driver_mode: Output driver mode (logic level family).
 + * @divider_phase: Divider initial phase after a SYNC. Range 0..63
 +    LSB = 1/2 of a period of the divider input clock.
 + * @channel_divider: 10-bit channel divider.
 + * @extended_name: Optional descriptive channel name.
 + */
 +
 struct ad9523_channel_spec { struct ad9523_channel_spec {
  unsigned channel_num;  unsigned channel_num;
Line 54: Line 67:
 }; };
  
-/*+/**
  * struct ad9523_platform_data - platform specific information  * struct ad9523_platform_data - platform specific information
 + *
 + * @vcxo_freq: External VCXO frequency in Hz
 + * @refa_diff_rcv_en: REFA differential/single-ended input selection.
 + * @refb_diff_rcv_en: REFB differential/single-ended input selection.
 + * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
 + * @osc_in_diff_en: OSC differential/ single-ended input selection.
 + * @refa_cmos_neg_inp_en: REFA single-ended neg./pos. input enable.
 + * @refb_cmos_neg_inp_en: REFB single-ended neg./pos. input enable.
 + * @zd_in_cmos_neg_inp_en: Zero Delay single-ended neg./pos. input enable.
 + * @osc_in_cmos_neg_inp_en: OSC single-ended neg./pos. input enable.
 + * @refa_r_div: PLL1 10-bit REFA R divider.
 + * @refb_r_div: PLL1 10-bit REFB R divider.
 + * @pll1_feedback_div: PLL1 10-bit Feedback N divider.
 + * @pll1_charge_pump_current_nA: Magnitude of PLL1 charge pump current (nA).
 + * @zero_delay_mode_internal_en: Internal, external Zero Delay mode selection.
 + * @osc_in_feedback_en: PLL1 feedback path, local feedback from
 + * the OSC_IN receiver or zero delay mode
 + * @pll1_loop_filter_rzero: PLL1 Loop Filter Zero Resistor selection.
 + * @ref_mode: Reference selection mode.
 + * @pll2_charge_pump_current_nA: Magnitude of PLL2 charge pump current (nA).
 + * @pll2_ndiv_a_cnt: PLL2 Feedback N-divider, A Counter, range 0..4.
 + * @pll2_ndiv_b_cnt: PLL2 Feedback N-divider, B Counter, range 0..63.
 + * @pll2_freq_doubler_en: PLL2 frequency doubler enable.
 + * @pll2_r2_div: PLL2 R2 divider, range 0..31.
 + * @pll2_vco_diff_m1: VCO1 divider, range 3..5.
 + * @pll2_vco_diff_m2: VCO2 divider, range 3..5.
 + * @rpole2: PLL2 loop filter Rpole resistor value.
 + * @rzero: PLL2 loop filter Rzero resistor value.
 + * @cpole1: PLL2 loop filter Cpole capacitor value.
 + * @rzero_bypass_en: PLL2 loop filter Rzero bypass enable.
 + * @num_channels: Array size of struct ad9523_channel_spec.
 + * @channels: Pointer to channel array.
 + * @name: Optional alternative iio device name.
  */  */
  
Line 62: Line 108:
  
  /* Differential/ Single-Ended Input Configuration */  /* Differential/ Single-Ended Input Configuration */
- bool refa_diff_rcv_en; + bool refa_diff_rcv_en; 
- bool refb_diff_rcv_en; + bool refb_diff_rcv_en; 
- bool zd_in_diff_en; + bool zd_in_diff_en; 
- bool osc_in_diff_en;+ bool osc_in_diff_en;
  
  /*  /*
  * Valid if differential input disabled  * Valid if differential input disabled
- * if not true defaults to pos input+ * if false defaults to pos input
  */  */
- bool refa_cmos_neg_inp_en; + bool refa_cmos_neg_inp_en; 
- bool refb_cmos_neg_inp_en; + bool refb_cmos_neg_inp_en; 
- bool zd_in_cmos_neg_inp_en; + bool zd_in_cmos_neg_inp_en; 
- bool osc_in_cmos_neg_inp_en;+ bool osc_in_cmos_neg_inp_en;
  
  /* PLL1 Setting */  /* PLL1 Setting */
- unsigned short refa_r_div; + unsigned short refa_r_div; 
- unsigned short refb_r_div; + unsigned short refb_r_div; 
- unsigned short pll1_feedback_div; + unsigned short pll1_feedback_div; 
- unsigned short pll1_charge_pump_current_nA; + unsigned short pll1_charge_pump_current_nA; 
- bool zero_delay_mode_internal_en; + bool zero_delay_mode_internal_en; 
- bool osc_in_feedback_en; + bool osc_in_feedback_en; 
- unsigned char pll1_loop_filter_rzero;+ enum pll1_rzero_resistor pll1_loop_filter_rzero;
  
  /* Reference */  /* Reference */
- enum ref_sel_mode ref_mode;+ enum ref_sel_mode ref_mode;
  
  /* PLL2 Setting */  /* PLL2 Setting */
- unsigned int pll2_charge_pump_current_nA; + unsigned int pll2_charge_pump_current_nA; 
- unsigned char pll2_ndiv_a_cnt; + unsigned char pll2_ndiv_a_cnt; 
- unsigned char pll2_ndiv_b_cnt; + unsigned char pll2_ndiv_b_cnt; 
- bool pll2_freq_doubler_en; + bool pll2_freq_doubler_en; 
- unsigned char pll2_r2_div; + unsigned char pll2_r2_div; 
- unsigned char pll2_vco_diff_m1; /* 3..5 */ + unsigned char pll2_vco_diff_m1; /* 3..5 */ 
- unsigned char pll2_vco_diff_m2; /* 3..5 */+ unsigned char pll2_vco_diff_m2; /* 3..5 */
  
  /* Loop Filter PLL2 */  /* Loop Filter PLL2 */
- unsigned char rpole2; + enum rpole2_resistor rpole2; 
- unsigned char rzero; + enum rzero_resistor rzero; 
- unsigned char cpole1; + enum cpole1_capacitor cpole1; 
- bool rzero_bypass_en;+ bool rzero_bypass_en;
  
  /* Output Channel Configuration */  /* Output Channel Configuration */
- int num_channels;+ int num_channels;
  struct ad9523_channel_spec *channels;  struct ad9523_channel_spec *channels;
  
- char name[SPI_NAME_SIZE];+ char name[SPI_NAME_SIZE];
 }; };
 </code> </code>
Line 249: Line 295:
 #if defined(CONFIG_AD9523) || defined(CONFIG_AD9523_MODULE) #if defined(CONFIG_AD9523) || defined(CONFIG_AD9523_MODULE)
  {  {
- .modalias = "ad9523",+ .modalias = "ad9523-1",
  .max_speed_hz = 1000000,     /* max spi clock (SCK) speed in HZ */  .max_speed_hz = 1000000,     /* max spi clock (SCK) speed in HZ */
  .bus_num = 0,  .bus_num = 0,
Line 278: Line 324:
 "make qconfig") "make qconfig")
  
-<note>+<WRAP round help>
 The AD9523 Driver depends on **CONFIG_SPI** The AD9523 Driver depends on **CONFIG_SPI**
-</note>+</WRAP>
  
 <code> <code>
 Linux Kernel Configuration Linux Kernel Configuration
  Device Drivers  --->  Device Drivers  --->
- [*] Staging drivers  ---> + <*>     Industrial I/O support ---> 
- <*>     Industrial I/O support ---> +     --- Industrial I/O support 
-     --- Industrial I/O support + Frequency Synthesizers DDS/PLL  ---> 
- Frequency Synthesizers DDS/PLL  ---> + Clock Generator/Distribution  --->  
- Clock Generator/Distribution  --->  +     [--snip--] 
-     [--snip--] + <*> Analog Devices AD9523 Low Jitter Clock Generator  
- +     [--snip--]
- <*> Analog Devices AD9523 Low Jitter Clock Generator  +
- +
-     [--snip--] +
 </code> </code>
  
Line 305: Line 347:
 {{page>software:linux:docs:iio:iio_snippets#iio device files&noheader&firstseconly&noeditbtn}} {{page>software:linux:docs:iio:iio_snippets#iio device files&noheader&firstseconly&noeditbtn}}
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **cd /sys/bus/iio/devices/** root:/> **cd /sys/bus/iio/devices/**
Line 314: Line 356:
 root:/> **ls -l** root:/> **ls -l**
 total 0 total 0
--r--r--r--    1 root     root          4096 Jan  1 00:01 dev+drwxr-xr-x    2 root     root             0 Jan  1 00:00 . 
 +drwxr-xr-x    3 root     root             0 Jan  1 00:00 .. 
 +-r--r--r--    1 root     root          4096 Jan  1 00:00 dev
 -r--r--r--    1 root     root          4096 Jan  1 00:00 name -r--r--r--    1 root     root          4096 Jan  1 00:00 name
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage0_ZD_OUTPUT_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage0_ZD_OUTPUT_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage0_ZD_OUTPUT_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage0_ZD_OUTPUT_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage0_ZD_OUTPUT_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage0_ZD_OUTPUT_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage1_DAC_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage1_DAC_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage1_DAC_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage1_DAC_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage1_DAC_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage1_DAC_CLK_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage2_ADC_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage2_ADC_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage2_ADC_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage2_ADC_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage2_ADC_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage2_ADC_CLK_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage4_DAC_REF_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage4_DAC_REF_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage4_DAC_REF_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage4_DAC_REF_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage4_DAC_REF_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage4_DAC_REF_CLK_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage5_TX_LO_REF_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage5_TX_LO_REF_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage5_TX_LO_REF_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage5_TX_LO_REF_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage5_TX_LO_REF_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage5_TX_LO_REF_CLK_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage6_DAC_DCO_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage6_DAC_DCO_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage6_DAC_DCO_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage6_DAC_DCO_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage6_DAC_DCO_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage6_DAC_DCO_CLK_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage8_ADC_SYNC_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage8_ADC_SYNC_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage8_ADC_SYNC_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage8_ADC_SYNC_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage8_ADC_SYNC_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage8_ADC_SYNC_CLK_raw 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage9_RX_LO_REF_CLK_frequency +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage9_RX_LO_REF_CLK_frequency 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage9_RX_LO_REF_CLK_phase +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage9_RX_LO_REF_CLK_phase 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 out_altvoltage9_RX_LO_REF_CLK_raw +-rw-r--r--    1 root     root          4096 Jan  1 00:00 out_altvoltage9_RX_LO_REF_CLK_raw 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_pll1_lock_detect +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll1_locked 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_pll2_feedback_clock +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll1_reference_clk_a_present 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_pll2_lock_detect +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll1_reference_clk_b_present 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_pll2_reference_clock +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll1_reference_clk_test_present 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_reference_a +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll2_feedback_clk_present 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_reference_b +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll2_locked 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_reference_test +-r--r--r--    1 root     root          4096 Jan  1 00:00 pll2_reference_clk_present 
--r--r--r--    1 root     root          4096 Jan  1 00:01 status_vcxo +--w-------    1 root     root          4096 Jan  1 00:00 store_eeprom 
---w-------    1 root     root          4096 Jan  1 00:01 store_eeprom +lrwxrwxrwx    1 root     root             0 Jan  1 00:00 subsystem -> ../../../../../../../../../bus/iio 
-lrwxrwxrwx    1 root     root             0 Jan  1 00:01 subsystem -> ../../../../../../../../../bus/iio +--w-------    1 root     root          4096 Jan  1 00:00 sync_dividers 
---w-------    1 root     root          4096 Jan  1 00:01 sync_dividers +-rw-r--r--    1 root     root          4096 Jan  1 00:00 uevent 
--rw-r--r--    1 root     root          4096 Jan  1 00:01 uevent +-r--r--r--    1 root     root          4096 Jan  1 00:00 vcxo_clk_present 
-</xterm></box>+</xterm></WRAP>
  
  
 === Show device name === === Show device name ===
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **cd /sys/bus/iio/devices/iio\:device0/** root:/> **cd /sys/bus/iio/devices/iio\:device0/**
 root:/> **cat name** root:/> **cat name**
 ad9523-lpc ad9523-lpc
-</xterm></box>+</xterm></WRAP>
  
 === Set ChannelY Output Frequency === === Set ChannelY Output Frequency ===
Line 372: Line 416:
 channel. channel.
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **cat out_altvoltage1_DAC_CLK_frequency** root:/> **cat out_altvoltage1_DAC_CLK_frequency**
Line 379: Line 423:
 root:/> **cat out_altvoltage1_DAC_CLK_frequency** root:/> **cat out_altvoltage1_DAC_CLK_frequency**
 245760000 245760000
-</xterm></box>+</xterm></WRAP>
  
 === Set ChannelY Output Divider Phase === === Set ChannelY Output Divider Phase ===
Line 391: Line 435:
 channel. channel.
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **cat out_altvoltage1_DAC_CLK_phase** root:/> **cat out_altvoltage1_DAC_CLK_phase**
Line 398: Line 442:
 root:/> **cat out_altvoltage1_DAC_CLK_phase** root:/> **cat out_altvoltage1_DAC_CLK_phase**
 3.1415920 3.1415920
-</xterm></box>+</xterm></WRAP>
  
 === Disable / Power Down ChannelY === === Disable / Power Down ChannelY ===
Line 407: Line 451:
 any value > 0 enables the channel.  any value > 0 enables the channel. 
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **cat out_altvoltage1_DAC_CLK_raw** root:/> **cat out_altvoltage1_DAC_CLK_raw**
Line 414: Line 458:
 root:/> **cat out_altvoltage1_DAC_CLK_raw** root:/> **cat out_altvoltage1_DAC_CLK_raw**
 0 0
-</xterm></box>+</xterm></WRAP>
  
 === Query Device Status === === Query Device Status ===
  
-/sys/bus/iio/devices/iio:deviceX/status_pllY_lock_detect\\ +/sys/bus/iio/devices/iio:deviceX/pll1_locked\\ 
-/sys/bus/iio/devices/iio:deviceX/status_pllY_feedback_clock\\ +/sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_a_present\\ 
-/sys/bus/iio/devices/iio:deviceX/status_pllY_reference_clock\\ +/sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_b_present\\ 
-/sys/bus/iio/devices/iio:deviceX/status_reference_a\\ +/sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_test_present\\ 
-/sys/bus/iio/devices/iio:deviceX/status_reference_b\\ +/sys/bus/iio/devices/iio:deviceX/pll2_feedback_clk_present\\ 
-/sys/bus/iio/devices/iio:deviceX/status_reference_test\\ +/sys/bus/iio/devices/iio:deviceX/pll2_locked\\ 
-/sys/bus/iio/devices/iio:deviceX/status_vcxo\\+/sys/bus/iio/devices/iio:deviceX/pll2_reference_clk_present\\ 
 +/sys/bus/iio/devices/iio:deviceX/vcxo_clk_present\\
  
-Reading returns either 'OK' or 'FAIL'. 'OK' means that the +Reading returns either '1' or '0'. '1' means that the 
-clock in question is present or the pllY is locked. 'FAIL'+clock in question is present or the pllY is locked. '0'
 means that the clock is missing or the pllY is unlocked. means that the clock is missing or the pllY is unlocked.
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
-root:/> **cat status_pll1_lock_detect** +root:/> **cat pll1_locked** 
-OK+
 + 
 +root:/> **grep "" pll* vcxo*** 
 +pll1_locked:
 +pll1_reference_clk_a_present:
 +pll1_reference_clk_b_present:
 +pll1_reference_clk_test_present:
 +pll2_feedback_clk_present:
 +pll2_locked:
 +pll2_reference_clk_present:
 +vcxo_clk_present:1
  
-root:/> grep "" status* +</xterm></WRAP>
-status_pll1_lock_detect:OK +
-status_pll2_feedback_clock:OK +
-status_pll2_lock_detect:OK +
-status_pll2_reference_clock:OK +
-status_reference_a:OK +
-status_reference_b:FAIL +
-status_reference_test:FAIL +
-status_vcxo:OK +
-</xterm></box>+
  
 === Save Current Device Config to EEPROM === === Save Current Device Config to EEPROM ===
Line 454: Line 500:
 automatically load the saved configuration. automatically load the saved configuration.
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **echo 1 > store_eeprom** root:/> **echo 1 > store_eeprom**
-</xterm></box>+</xterm></WRAP>
  
 === SYNC Device === === SYNC Device ===
Line 469: Line 515:
 /SYNC pin low. /SYNC pin low.
  
-<box 100% green|shell prompt running on the target>+<WRAP box bggreen><wrap info>This specifies any shell prompt running on the target</wrap>
 <xterm> <xterm>
 root:/> **echo 1 > sync_dividers** root:/> **echo 1 > sync_dividers**
-</xterm></box>+</xterm></WRAP>
  
 ====== More Information ====== ====== More Information ======
  
 {{page>software:linux:docs:iio:iio_snippets#iio pointers&noheader&firstseconly&noeditbtn}} {{page>software:linux:docs:iio:iio_snippets#iio pointers&noheader&firstseconly&noeditbtn}}
resources/tools-software/linux-drivers/iio-pll/ad9523.1336144580.txt.gz · Last modified: 04 May 2012 17:16 by Michael Hennerich