This version (02 Feb 2022 08:07) was approved by Dragos Bogdan.

AD9083 Linux Driver

Supported Devices

AD9083

Supported Boards

EVAL-AD9083

Supported HDL Cores

AD9083 FMC Card HDL Reference Design

Description

The AD9083 is a 16-channel, 125 MHz bandwidth, continuous time Σ-Δ (CTSD) ADC. The device features an on-chip, programmable, single-pole antialiasing filter and termination resistor that is designed for low power, small size, and ease of use. The 16 ADC cores features a first-order, CTSD modulator architecture with integrated, background nonlinearity correction logic and self cancelling dither. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. Each ADC has a signal processing tile to filter out of band shaped noise from the Σ-Δ ADC and reduce the sample rate. Each tile contains a cascaded integrator comb (CIC) filter, a quadrature digital downconverter (DDC) with multiple finite input response (FIR) decimation filters (decimate by J block), or up to three quadrature DDC channels with averaging decimation filters for data gating applications. Users can configure the Subclass 1 JESD204B based, high speed serialized output in a variety of lane configurations (up to four), depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF±, TRIG±, and SYNCINB± input pins. The AD9083 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V capable 3-wire serial port interface (SPI). The AD9083 is available in a Pb-free, 100-ball CSP_BGA and is specified over the −40°C to +85°C industrial temperature range.

Source Code

Files

Function	File
driver	drivers/iio/adc/ad9083.c
API driver	drivers/iio/adc/ad9083

Example device trees

Function	File
dtsi	adi-ad9083-fmc-ebz.dtsi
dts	zynqmp-zcu102-rev10-ad9083-fmc-ebz.dts
Documentation	adi,ad9083.yaml

Interrelated Device Drivers

Transport Layer Receive AXI-ADC driver

Function	File
driver	drivers/iio/adc/cf_axi_adc_core.c
driver	drivers/iio/adc/cf_axi_adc_ring_stream.c
include	drivers/iio/adc/cf_axi_adc.h

Documentation: AXI ADC HDL Linux Driver

Link Layer AXI JESD204B HDL driver

Function	File
driver	drivers/iio/jesd204/axi_jesd204_rx.c
driver	drivers/iio/jesd204/axi_jesd204_tx.c

Documentation:

PHY Layer AXI JESD204B GT (Gigabit Tranceiver) HDL driver (XILINX/ALTERA-INTEL)

Function	File
driver	drivers/iio/jesd204/axi_adxcvr.c

Documentation:

JESD204B/C AXI_ADXCVR Highspeed Transceivers Linux Driver

Enabling Linux driver support

Configure kernel with “make menuconfig” (alternatively use “make xconfig” or “make qconfig”)

The AD9083 driver depends on CONFIG_SPI

Adding Linux driver support

Configure kernel with “make menuconfig” (alternatively use “make xconfig” or “make qconfig”)

Linux Kernel Configuration
	Device Drivers  --->
	<*>     Industrial I/O support --->
	    --- Industrial I/O support
	    -*-   Enable ring buffer support within IIO
	    -*-     Industrial I/O lock free software ring
	    -*-   Enable triggered sampling support

	          *** Direct Digital Synthesis ***
	    [--snip--]

		<*>   Analog Devices CoreFPGA AXI DDS driver
		<*>   Analog Devices AD9083 16-Channel, 125 MHz Bandwidth, JESD204B ADC

	    [--snip--]

Device Tree Example

adi-ad9083-fmc-ebz.dtsi

#include <dt-bindings/iio/adc/adi,ad9083.h>
&spi0 {
	adc0_ad9083: ad9083@0 {
		compatible = "adi,ad9083";
		reg = <0>;
 
		jesd204-device;
		#jesd204-cells = <2>;
		jesd204-top-device = <0>;
		jesd204-link-ids = <0>;
		jesd204-inputs = <&axi_ad9083_core_rx 0 0>;
 
		spi-max-frequency = <1000000>;
		clocks = <&ad9528 13>;
		clock-names = "adc_ref_clk";
		adi,adc-frequency-hz= /bits/ 64 <2000000000>; /* 2 GHz */
 
		/* adi_ad9083 config */
 
		adi,vmax-microvolt = <1800>;
		adi,fc-hz =  /bits/ 64 <800000000>;
		adi,rterm-ohms = <100>;
		adi,backoff = <0>;
		adi,finmax-hz = /bits/ 64 <100000000>;
		adi,nco0_freq-hz = /bits/ 64 <0>;
		adi,nco1_freq-hz = /bits/ 64 <0>;
		adi,nco2_freq-hz = /bits/ 64 <0>;
		adi,cic_decimation = /bits/ 8 <AD9083_CIC_DEC_4>;
		adi,j_decimation = /bits/ 8 <AD9083_J_DEC_4>;
		adi,g_decimation = /bits/ 8 <0>;
		adi,h_decimation = /bits/ 8 <0>;
		adi,nco0_datapath_mode = /bits/ 8 <AD9083_DATAPATH_ADC_CIC_J>;
 
		/* JESD204 parameters */
 
		adi,octets-per-frame = <8>;
		adi,frames-per-multiframe = <32>;
		adi,converter-resolution = <16>;
		adi,bits-per-sample = <16>;
		adi,converters-per-device = <16>;
		adi,control-bits-per-sample = <0>;
		adi,lanes-per-device = <4>;
		adi,subclass = <0>;
	};
};

Driver testing

In case the driver probes successfully and the device gets instantiated. Your systems kernel messages should include some line, which may look like the one shown below.

[    8.404405] ad9083 spi1.0: AD9083 Rev. 1 Grade 0 (API 1.0.1) probed

Each and every IIO device, typically a hardware chip, has a device folder under /sys/bus/iio/devices/iio:deviceX. Where X is the IIO index of the device. Under every of these directory folders reside a set of files, depending on the characteristics and features of the hardware device in question. These files are consistently generalized and documented in the IIO ABI documentation. In order to determine which IIO deviceX corresponds to which hardware device, the user can read the name file /sys/bus/iio/devices/iio:deviceX/name. In case the sequence in which the iio device drivers are loaded/registered is constant, the numbering is constant and may be known in advance.

02 Mar 2011 15:16