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The Evaluation boards used in the AD242x demos are explained in the following subsections.
Figure 20 shows an EVAL-AD2428WD1BZ board which can be used as either an A2B main or sub node. The board has following components
Figure 20: EVAL-AD2428WD1BZ board
Jumper | Action/Pin no | Comments |
---|---|---|
Used as main-node | ||
JP1 (A2B power) | Install | - |
JP2 | Uninstall | Install when phantom power or hybrid power support is required |
JP3 | Uninstall | Install when phantom power or hybrid power support is required |
JP4 (BOOT) | Install | Self-Boot option disabled |
JP5 (BCLK) | 3-4 | ADAU1452_BCLK_OUT0 → AD2428_BCLK |
JP6 (SYNC) | 3-4 | ADAU1452_LRCLK_OUT0 → AD2428_SYNC |
JP7 (DRX0) | 3-4 | ADAU1452_SDATA_OUT0 → AD2428_DRX0 |
JP8 (DRX1) | 2-3 | ADAU1452_SDATA_OUT1 → AD2428_DRX1 If Secondary Rx data line DRX1 is desired. Uninstall if only primary data line DRX0 is required. |
JP9 (DTX1) | 3-4 | AD2428_DTX1 → ADAU1452_SDATA_IN1 If Secondary Tx data line DTX1 is desired. Uninstall if only primary data line DTX0 is required. |
JP10 (DTX0) | 1-2 | AD2428_DTX0 → ADAU1452_SDATA_IN0 |
JP11 (ADMP621 CLK) | Uninstall | - |
JP12 (NTC) | Install | - |
JP13 (A2B_REG) | Uninstall | - |
JP14 (VOLTAGE) | Uninstall | Install/ Uninstall depending on VIN requirement. Installed → VIN = 7V Uninstalled → VIN = 8V |
JP19 (1961 BCLK) | 1-2 | ADAU1761 MCLK from CLKOUT of ADAU1452 |
- | - | - |
Used as sub-node | ||
JP1 (A2B power) | Install | - |
JP2 | Uninstall | Install when phantom power or hybrid power support is required |
JP3 | Uninstall | Install when phantom power or hybrid power support is required |
JP4 (BOOT) | Install | Self-Boot option disabled |
JP5 (BCLK) | 3-4-5 | AD2428_BCLK → ADAU1452_BCLK_OUT0 & ADAU1452_BCLK_IN0 (Use a three-way wire connector – Figure 21) |
JP6 (SYNC) | JP5(3-4) & JP7(5) | AD2428_SYNC → ADAU1452_LRCLK_OUT0 & ADAU1452_LRCLK_IN0 |
JP7 (DRX0) | 3-4 | ADAU1452_SDATA_OUT0 → AD2428_DRX0 JP7.5 should be connected to SYNC signals on JP6.3 & JP6.4 (Use a three-way wire connector – Figure 21) |
JP8 (DRX1) | 2-3 | ADAU1452_SDATA_OUT1 → AD2428_DRX1 If Secondary Rx data line DRX1 is desired. Uninstall if only primary data line DRX0 is required. |
JP9 (DTX1) | 3-4 | AD2428_DTX1 → ADAU1452_SDATA_IN1 If Secondary Tx data line DTX1 is desired. Uninstall if only primary data line DTX0 is required. |
JP10 (DTX0) | 1-2 | AD2428_DTX0 → ADAU1452_SDATA_IN0 |
JP11 (ADMP621 CLK) | Uninstall | - |
JP12 (NTC) | Install | - |
JP13 (A2B_REG) | Uninstall | - |
JP14 (VOLTAGE) | Uninstall | Install depending on VIN requirement. Installed → VIN = 7V Uninstalled → VIN = 8V |
JP19 (1961 BCLK) | 1-2 | ADAU1761 MCLK from CLKOUT of ADAU1452 |
Figure 21: Three way jumper connection
EVAL-AD2428WD1BZ with 1452 Without Bypass
Jumper | Action/Pin no | Comments |
---|---|---|
Used as main-node | ||
JP1 (A2B power) | Install | - |
JP2 | Uninstall | Install when phantom power or hybrid power support is required |
JP3 | Uninstall | |
JP4 (BOOT) | Install | Self-Boot option disabled |
JP5 (BCLK) | 3-4 | ADAU1452_BCLK_OUT0 → AD2428_BCLK |
JP6 (SYNC) | 3-4 | ADAU1452_LRCLK_OUT0 → AD2428_SYNC |
JP7 (DRX0) | 3-4 | ADAU1452_SDATA_OUT0 → AD2428_DRX0 |
JP8 (DRX1) | 2-3 | ADAU1452_SDATA_OUT1 → AD2428_DRX1 If Secondary Rx data line DRX1 is desired. Uninstall if only primary data line DRX0 is required. |
JP9 (DTX1) | 3-4 | AD2428_DTX1 → ADAU1452_SDATA_IN1 If Secondary Tx data line DTX1 is desired. Uninstall if only primary data line DTX0 is required. |
JP10 (DTX0) | 1-2 | AD2428_DTX0 → ADAU1452_SDATA_IN0 |
JP11 (ADMP621 CLK) | Uninstall | - |
JP12 (NTC) | Install | - |
JP13 (A2B_REG) | Uninstall | - |
JP14 (VOLTAGE) | Uninstall | Install/ Uninstall depending on VIN requirement. Installed → VIN = 7V Uninstalled → VIN = 8V |
JP19 (1961 BCLK) | 1-2 | ADAU1761 MCLK from CLKOUT of ADAU1452 |
- | - | - |
Used as sub-node | ||
JP1 (A2B power) | Install | - |
JP2 | Uninstall | Install when phantom power or hybrid power support is required |
JP3 | Uninstall | Install when phantom power or hybrid power support is required |
JP4 (BOOT) | Install | Self-Boot option disabled |
JP5 (BCLK) | 1-3 | AD2428_BCLK → ADAU1961_BCLK |
JP6 (SYNC) | 1-3 | AD2428_SYNC → ADAU1961_LRCLK |
JP7 (DRX0) | 1-3 | ADAU1961_ADC → AD2428_DRX0 |
JP8 (DRX1) | Uninstall | - |
JP9 (DTX1) | Uninstall | - |
JP10 (DTX0) | 2-3 | AD2428_DTX0 → ADAU1961_DAC |
JP11 (ADMP621 CLK) | Uninstall | - |
JP12 (NTC) | install | - |
JP13 (A2B_REG) | Uninstall | - |
JP14 (VOLTAGE) | Uninstall | Install/ Uninstall depending on VIN requirement. Installed → VIN = 7V Uninstalled → VIN = 8V |
JP19 (1961 BCLK) | 2-3 | ADAU1761 MCLK from AD2428_BCLK |
The Figure 22 shows an EVAL-AD2428WB1BZ board which can be used as an A2B sub node. The board has following peripherals
Figure 22: EVAL-AD2428WB1BZ board
The Figure 23 shows an EVAL-AD2428WC1BZ board which can be used as an A2B sub node. The board has following peripherals
Figure 23: EVAL-AD2428WC1BZ board
To run the sample demo, the following setup connections are to be made.
A2B Evaluation boards shall be connected in the following order
Figure 24: A2B Eval board connections
Figure 25: Two local powered AD2428WD1BZ boards (One of the audio stream is shown here)
As per Figure 25 two local powered nodes can be connected to each other to form an A2B network. One of them is a main node and the other is a sub node. This figure represents one of the two audio stream configurations. Figure 26 and Figure 27 represent the audio configurations with and without bypassing the 1452 DSP respectively. Connect audio sources and sinks as per these two figures.
Figure 26: Audio routing without 1452 DSP bypass
Figure 27: Audio routing with 1452 DSP bypass