This shows you the differences between two versions of the page.
Both sides previous revision Previous revision | |||
resources:technical-guides:surge [23 Aug 2022 17:45] valerie hamilton s |
resources:technical-guides:surge [09 Sep 2022 12:07] valerie hamilton s |
||
---|---|---|---|
Line 4: | Line 4: | ||
Per the IEC 61000-4-5 standard for industrial environments, the surge is a combination wave of 1.2 μs rising time with 50 μs pulse width open circuit voltage and 8 μs rising time with 20 μs pulse width short-circuit current. The DUT (Device under test) is subject to five positive and five negative surges at each rating. The interval between each surge is 1 min. The surge is tested to the AD74115H output cable, which is treated as unshielded asymmetrically operated interconnection lines of the DUT. The surge is applied to the I/O and sense lines through CDN 117. | Per the IEC 61000-4-5 standard for industrial environments, the surge is a combination wave of 1.2 μs rising time with 50 μs pulse width open circuit voltage and 8 μs rising time with 20 μs pulse width short-circuit current. The DUT (Device under test) is subject to five positive and five negative surges at each rating. The interval between each surge is 1 min. The surge is tested to the AD74115H output cable, which is treated as unshielded asymmetrically operated interconnection lines of the DUT. The surge is applied to the I/O and sense lines through CDN 117. | ||
- | The CDNs do not influence the specified functional conditions of the DUT. The interconnection line between the DUT and the CDN is 2 m in length or shorter | + | The CDNs (coupling decoupling network) do not influence the specified functional conditions of the DUT. The interconnection line between the DUT and the CDN is 2 m in length or shorter |
===Table 1 IEC 61000-4-5 Surge Test Levels=== | ===Table 1 IEC 61000-4-5 Surge Test Levels=== | ||
Line 24: | Line 24: | ||
\\ | \\ | ||
===Hardware Configuration=== | ===Hardware Configuration=== | ||
- | The use cases tested during surge testing were voltage output (and by default voltage input), internal digital output sourcing and sinking. The external sense pins SENSE_EXT1 and SENSE_EXT2 were also subject to testing. The reasoning for these particular use cases were to ensure the integrity of the I/O and sense screw terminals along with the internal fets used for the internal digital output use case. The surge was coupled to each screw terminal one at a time with respect to IO_N (AGND). Unshielded cable was used for all use cases. | + | The use cases tested during surge testing were voltage output (and voltage input by reconfiguring the ADC input nodes), internal digital output sourcing and sinking. The external sense pins SENSE_EXT1 and SENSE_EXT2 were also subject to testing. The reasoning for these particular use cases were to ensure the integrity of the I/O and sense screw terminals along with the internal fets used for the internal digital output use case. The surge was coupled to each screw terminal one at a time with respect to IO_N (AGND). Unshielded cable was used for all use cases. |
\\ | \\ | ||