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| resources:quick-start:ad5686r [13 Apr 2012 10:39] – Approved Padraic O Reilly | resources:quick-start:ad5686r [16 Apr 2012 11:58] – [Quad, 16-/14-/12-Bit, Voltage Output, nanoDAC+® with a 2 ppm/ºC Reference, SPI Interface] Padraic O Reilly | ||
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| Line 1: | Line 1: | ||
| ====== AD5686R/ | ====== AD5686R/ | ||
| - | ===== Quad, 16-/ | + | ===== Quad, 16-/ |
| {{ : | {{ : | ||
| ===== Features ===== | ===== Features ===== | ||
| - | * High relative accuracy (INL): ±2 LSB maximum (16-bit AD5686R) | + | * High relative accuracy (INL): ±2 LSB maximum (16-bit |
| - | * Low drift 2.5 V on-chip reference: | + | * Low drift 2.5 V on-chip reference: |
| * Tiny 3 mm × 3 mm 16-lead LFCSP or 16-lead TSSOP package | * Tiny 3 mm × 3 mm 16-lead LFCSP or 16-lead TSSOP package | ||
| - | * Total Unadjusted Error (TUE): 0.1 % of FSR max | + | * Total unadjusted error (TUE): 0.1 % of FSR maximum |
| * Offset error: 1.5 mV maximum | * Offset error: 1.5 mV maximum | ||
| * Gain error: 0.1% of FSR maximum | * Gain error: 0.1% of FSR maximum | ||
| Line 17: | Line 17: | ||
| * 2.7 V to 5.5 V power supply | * 2.7 V to 5.5 V power supply | ||
| * −40°C to +105°C temperature range | * −40°C to +105°C temperature range | ||
| - | + | ===== Pin Configurations: 16-Lead LFCSP (Left) and 16-Lead TSSOP (Right) | |
| - | ===== Pin Configurations ===== | + | |
| {{: | {{: | ||
| {{: | {{: | ||
| \\ | \\ | ||
| - | ==== Table 1. Function Descriptions for Quick Start ==== | + | ====Table 1. Function Descriptions for Quick Start==== |
| ^ | ^ | ||
| - | |V< | + | |V< |
| - | |V< | + | |V< |
| - | |V< | + | |V< |
| - | |V< | + | |V< |
| - | |SYNC | Connect to serial interface. | + | |SYNC | Connect to serial interface. |
| - | |SCLK | Connect to serial interface. | + | |SCLK | Connect to serial interface. |
| - | |SDIN | Connect to serial interface. | + | |SDIN | Connect to serial interface. |
| - | |V< | + | |SDO|No connect.| |
| + | |V< | ||
| |V< | |V< | ||
| - | |GND | Connect to ground. | + | |GND | Connect to ground.| |
| - | |LDAC | Tie low. | | + | |LDAC | Tie low. | |
| - | |RSTSEL | Tie to GND to power up to zero scale. | + | |RSTSEL | Tie to GND to power up to zero scale.| |
| - | |GAIN | Tie to GND. DAC outputs have a span from 0 V to V< | + | |GAIN | Tie to GND. DAC outputs have a span from 0 V to V< |
| - | |RESET | + | |RESET |
| - | |V< | + | |V< |
| - | + | \\ | |
| - | \\ | + | |
| \\ | \\ | ||
| ===== Shift Register Contents ===== | ===== Shift Register Contents ===== | ||
| {{ : | {{ : | ||
| - | ==== Table 2. Command Definitions ==== | + | ====Table 2. Command Definitions==== |
| ^Command^^^^Description^ | ^Command^^^^Description^ | ||
| |C3 |C2 |C1 |C0 | | | |C3 |C2 |C1 |C0 | | | ||
| Line 54: | Line 53: | ||
| |0 |1 |0 |0 |Power down/power up DAC | | |0 |1 |0 |0 |Power down/power up DAC | | ||
| |0 |1 |0 |1 |Hardware LDAC mask register| | |0 |1 |0 |1 |Hardware LDAC mask register| | ||
| - | |0 |1 |1 |0 |Software reset(power-on reset)| | + | |0 |1 |1 |0 |Software reset (power-on reset)| |
| |0 |1 |1 |1 |Internal reference setup register| | |0 |1 |1 |1 |Internal reference setup register| | ||
| |1 |0 |0 |0 |Set up DCEN register (daisy-chain enable)| | |1 |0 |0 |0 |Set up DCEN register (daisy-chain enable)| | ||
| Line 66: | Line 65: | ||
| < | < | ||
| where: | where: | ||
| - | D is the decimal equivalent. \\ | + | //D// is the decimal equivalent. \\ |
| - | N is the number of bits. \\ | + | //N// is the number of bits. \\ |
| \\ | \\ | ||
| ==== Simple Write: Example 1 ==== | ==== Simple Write: Example 1 ==== | ||
| <note tip>To update Channel A, write the following over the serial interface: 0001 XXX1 1000000000000000 | <note tip>To update Channel A, write the following over the serial interface: 0001 XXX1 1000000000000000 | ||
| - | (four command bits, four address bits, 16 data bits for the AD5686R).\\ | + | (four command bits, four address bits, 16 data bits for the [[adi> |
| This updates Channel A to midscale. | This updates Channel A to midscale. | ||
| GAIN = 1, V< | GAIN = 1, V< | ||
resources/quick-start/ad5686r.txt · Last modified: 03 Jan 2013 20:42 by 127.0.0.1