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| resources:fpga:xilinx:pmod:adp5589 [30 Sep 2013 09:59] – links modified Alexandru.Tofan | resources:fpga:xilinx:pmod:adp5589 [30 Sep 2013 15:51] – [Functional Description] Alexandru.Tofan | ||
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| * COL4 to COL1 are seen by the ADP5589 as R3 to R0. \\ | * COL4 to COL1 are seen by the ADP5589 as R3 to R0. \\ | ||
| UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board. \\ | UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board. \\ | ||
| + | </ | ||
| + | |||
| + | <WRAP round important 80%> | ||
| + | When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in " | ||
| + | |||
| + | <code c> | ||
| + | // Select between PS7 or AXI Interface | ||
| + | #define USE_PS7 1 | ||
| + | // SPI used in the design | ||
| + | #define USE_SPI 0 | ||
| + | // I2C used in the design | ||
| + | #define USE_I2C 1 | ||
| + | // Timer (+interrupts) used in the design | ||
| + | #define USE_TIMER 0 | ||
| + | // External interrupts used in the design | ||
| + | #define USE_EXTERNAL | ||
| + | // GPIO used in the design | ||
| + | #define USE_GPIO | ||
| + | </ | ||
| + | |||
| </ | </ | ||
resources/fpga/xilinx/pmod/adp5589.txt · Last modified: 09 Jan 2021 00:57 by Robin Getz