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resources:fpga:xilinx:pmod:ad7991 [12 Apr 2013 15:30] – [Downloads] Lucian Sinresources:fpga:xilinx:pmod:ad7991 [30 Sep 2013 15:16] – text Alexandru.Tofan
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 **HW Platform(s):**  **HW Platform(s):** 
-   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] +   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]  
-   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]  +   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]] 
-   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD2|PmodAD2 (Digilent)]] \\ +   * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
-**System:** Microblaze, AXI, UART \\+
  
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
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 ==== Required Hardware ==== ==== Required Hardware ====
   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
-  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]   +  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]   
 +  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] 
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD2|PmodAD2 (Digilent)]]   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD2|PmodAD2 (Digilent)]]
  
 ==== Required Software ==== ==== Required Software ====
   * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).   * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board. +  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<WRAP round 80% tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ +<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ 
-If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details. +If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\ 
-</WRAP> +If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP> 
- +
-Extract the project from the archive file (AD7991_<board_name>.zip) to the location you desire. +
  
 ==== Avnet LX9 MicroBoard Setup ==== ==== Avnet LX9 MicroBoard Setup ====
 +
 +Extract the project from the archive file (AD7991_<board_name>.zip) to the location you desire.
 +
 To begin, connect the PmodAD2 to J5 connector of LX9 board, pins 3 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector. To begin, connect the PmodAD2 to J5 connector of LX9 board, pins 3 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
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 ==== Digilent Nexys™3 Spartan-6 FPGA Board ==== ==== Digilent Nexys™3 Spartan-6 FPGA Board ====
 +
 +Extract the project from the archive file (AD7991_<board_name>.zip) to the location you desire.
 +
 To begin, connect the PmodAD2 to JA connector of Nexys™3 board, pins JA3 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). To begin, connect the PmodAD2 to JA connector of Nexys™3 board, pins JA3 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
  
 {{:resources:fpga:xilinx:pmod:pmodad2_nexys3.jpg?200|PmodAD2 and Nexys™3}} {{:resources:fpga:xilinx:pmod:pmodad2_nexys3.jpg?200|PmodAD2 and Nexys™3}}
  
-<WRAP round 80% important> 
-\\ 
-If you do not use an extension cable, please connect the PmodAD2 as shown in the picture below. If you connect it using all 8 pins (inserting it completely in the Pmod connector J5 on the LX-9 Board, IIC won't work, because the second row of pins are grounded.</WRAP> 
  
-==== FPGA Configuration ====+==== Avnet ZedBoard ==== 
 + 
 +To begin, connect the PmodAD2 to JC1 connector of ZedBoard (see image below). You must use an extension cable. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodad2_zed.jpg?400|PmodACL and ZedBoard}} 
 + 
 +==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ====
  
 Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7991/sw/AD7991.bit). Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7991/sw/AD7991.bit).
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 {{:resources:fpga:xilinx:pmod:PmodAD2Impact.jpg?200|Programming FPGA in IMPACT}} {{:resources:fpga:xilinx:pmod:PmodAD2Impact.jpg?200|Programming FPGA in IMPACT}}
  
-If programming was successful, you should be seeing messages appear on the terminal window as shown in the figure below. After programming the AD7991 device, the program will automatically read the values of the analog voltage inputs, and print them via UART. Pressing any key will initialize another conversion on the next channel.+==== FPGA Configuration for ZedBoard ====
  
-{{:resources:fpga:xilinx:pmod:pmodad2hyper.jpg?200|UART messeges}}+Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page).  
 +The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
  
 +<WRAP center round tip 80%>
 +If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
 +</WRAP>
  
 +If programming was successful, you should be seeing messages appear on the terminal window as shown in the figure below. After programming the AD7991 device, the program will automatically perform 20 conversions and print the values of the analog voltage inputs via UART. 
 +
 +{{:resources:fpga:xilinx:pmod:pmodad2hyper.jpg?200|UART messeges}}
  
 ===== Using the reference design ===== ===== Using the reference design =====
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 <WRAP round 80% important> <WRAP round 80% important>
   * Connecting the PmodAD2 to the desired Board using an extension cable provides ease of use.   * Connecting the PmodAD2 to the desired Board using an extension cable provides ease of use.
-  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.+  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board.
   * The reference voltage for the AD7991 is 2V (set using jumper J1 on the PmodAD2). If you want to use another reference voltage, you will need to modify the VREF definition at the beggining of "main.c".   * The reference voltage for the AD7991 is 2V (set using jumper J1 on the PmodAD2). If you want to use another reference voltage, you will need to modify the VREF definition at the beggining of "main.c".
   * If you desire to read fewer Channels, select internal reference, enable or disable IIC filtering, you will need to modify the parameters sent by the "AD7911_Config" function.   * If you desire to read fewer Channels, select internal reference, enable or disable IIC filtering, you will need to modify the parameters sent by the "AD7911_Config" function.
 </WRAP> </WRAP>
  
 +<WRAP round important 80%>
 +When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in "system_config.h":
 +
 +<code c>
 +// Select between PS7 or AXI Interface
 +#define USE_PS7 1
 +// SPI used in the design
 +#define USE_SPI 0
 +// I2C used in the design
 +#define USE_I2C 1
 +// Timer (+interrupts) used in the design
 +#define USE_TIMER 0
 +// External interrupts used in the design
 +#define USE_EXTERNAL     0
 +// GPIO used in the design
 +#define USE_GPIO         0
 +</code>
 +
 +</WRAP>
  
 ===== Downloads ===== ===== Downloads =====
 <WRAP round download 80%> <WRAP round download 80%>
 \\ \\
-{{:resources:fpga:xilinx:pmod:ad7991_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\ +**Avnet LX-9 MicroBoard: **\\ 
-{{:resources:fpga:xilinx:pmod:ad7991_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} +    * {{:resources:fpga:xilinx:pmod:ad7991_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
-</WRAP>+
  
 +**Digilent Nexys™3:**\\
 +    * {{:resources:fpga:xilinx:pmod:ad7991_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}\\
 +
 +**Avnet ZedBoard:**\\
 +    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed|XPS Project]]\\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD2|PmodAD2 Driver Files]]\\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/Common/sw|ZYNQ SoC Peripherals Driver Files]] \\
 +    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD2/bin|Programming Script]]\\
 +    
 +</WRAP>
  
 ===== More information ===== ===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}
resources/fpga/xilinx/pmod/ad7991.txt · Last modified: 09 Jan 2021 00:49 by Robin Getz

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