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--- resources:fpga:xilinx:pmod:ad7780 [10 Dec 2012 15:50] – Download Wrapper Alexandru.Tofan
+++ resources:fpga:xilinx:pmod:ad7780 [09 Jan 2021 00:49] (current) – user interwiki links Robin Getz
@@ Line 6: / Line 6: @@
 **HW Platform(s):**
-   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+   * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
    * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
-   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD3|PmodAD3 (Digilent)]] \\
+   * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
-**System:** Microblaze, AXI, UART \\
 ===== Quick Start Guide =====
@@ Line 16: / Line 15: @@
 ==== Required Hardware ====
-  * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+  * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
+  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]]
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD3|PmodAD3 (Digilent)]]
 ==== Required Software ====
-  * Xilinx ISE 14.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
+  * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.
+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.
 ==== Running Demo (SDK) Program ====
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
+<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
-If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.
+If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\
-</note>
+If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP>
-Extract the project from the archive file (AD7780_<board_name>.zip) to the location you desire.
 ==== Avnet LX9 MicroBoard Setup ====
-To begin, connect the PmodAD3 to J5 connector of LX9 board (see image below). Connect the USB cables from the PC to the board.
+Extract the project from the archive file (AD7780_<board_name>.zip) to the location you desire.
+To begin, connect the PmodAD3 to J5 connector of LX9 board (see image below). Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
 {{:resources:fpga:xilinx:pmod:pmodad3.jpg?200|PmodAD3 and LX-9}}
@@ Line 39: / Line 40: @@
 ==== Digilent Nexys™3 Spartan-6 FPGA Board ====
-To begin, connect the PmodAD3 to JA connector of Nexys™3 board (see image below). Connect the USB cables from the PC to the board.
+Extract the project from the archive file (AD7780_<board_name>.zip) to the location you desire.
+To begin, connect the PmodAD3 to JA connector of Nexys™3 board (see image below). Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
 {{:resources:fpga:xilinx:pmod:pmodad3_nexys3.jpg?200|PmodAD3 and Nexys™3}}
-==== FPGA Configuration ====
+==== Avnet ZedBoard ====
-Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7780/sw/AD7780.bit).
+To begin, connect the PmodAD3 to JD connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodad3_zed.jpg?200|PmodAD3 and ZedBoard}}
+==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ====
+Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7780/sw/AD7780.bit).
 {{:resources:fpga:xilinx:pmod:PmodAD3impact.jpg?200|Programming FPGA in IMPACT}}
-If programming was successful, the **Main Menu** will appear in your **UART** terminal, as seen in the pictures below. There are 6 options available for you. Use **[1] to [6]** in order to choose the desired one.
+If programming was successful, the Main Menu will appear in your UART terminal, as seen in the pictures below. There are 6 options available for you. Use **[v], [f], [g], [p], [r], [s], [m]** in order to choose the desired one.
-{{:resources:fpga:xilinx:pmod:pmodad3demo1.jpg?600|Main Menu}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu1.jpg?600|Main Menu}}
-**Display Vin** allows printing the input voltage over the **UART** with the appropriate output rate (10 Hz or 16.7 Hz, depending on Filter settings). Pressing **[q]** will return to menu.
+**Display Vin** allows printing the input voltage over the **UART** with the appropriate output rate (10 Hz or 16.7 Hz, depending on Filter settings). Pressing **[m]** will return to menu.
-{{:resources:fpga:xilinx:pmod:pmodad3demo2.jpg?600|Display Vin}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu2.jpg?600|Display Vin}}
 If the device is **Powered Down** the user will be prompted to **Power Up** the device prior to trying to display the input voltage.
-{{:resources:fpga:xilinx:pmod:pmodad3demo2_1.jpg?600|Display Vin error messege}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu3.jpg?600|Display Vin error messege}}
 **Change Filter Option** allows selecting between 10 Hz and 16.7 Hz Output Rate.
-{{:resources:fpga:xilinx:pmod:pmodad3demo3.jpg?600|Change Filter Options}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu4.jpg?600|Change Filter Options}}
 **Change Gain Option** allows selecting between a gain of 128 or a gain of 1.
-{{:resources:fpga:xilinx:pmod:pmodad3demo4.jpg?600|Change Gain Option}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu5.jpg?600|Change Gain Option}}
 **Power Down / Power Up** allows powering down the device or powering it back up.
-{{:resources:fpga:xilinx:pmod:pmodad3demo5.jpg?600|Power Up/Down device}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu6.jpg?600|Power Up/Down device}}
 **Modify Voltage Reference** allows changing the voltage reference that is used to calculate the value displayed over UART. The default value is 3300 mV. If using another reference voltage, please modify it here before printing values, in order to obtain correct results. If any value besides **1** to **9** is entered, an error message will be displayed. If a value **higher than 5000** is entered, an error message will be displayed. If entering less than **4** characters, please press **[Enter]** in order to validate your input. If 4 characters are entered, the result is automatically validated.
-{{:resources:fpga:xilinx:pmod:pmodad3demo6.jpg?600|Modify Voltage Reference}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu7.jpg?600|Modify Voltage Reference}}
 Input errors are displayed in the following picture.
-{{:resources:fpga:xilinx:pmod:pmodad3demo6_1.jpg?600|Modify Voltage Reference errors}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu8.jpg?600|Modify Voltage Reference errors}}
 **Display current settings** allows printing the current settings for the device. Any pressed key will take you back to the menu.
-{{:resources:fpga:xilinx:pmod:pmodad3demo7.jpg?600|Display current settings}}
+{{:resources:fpga:xilinx:pmod:pmodad3_menu9.jpg?600|Display current settings}}
+==== FPGA Configuration for ZedBoard ====
+Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page).
+The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
+<WRAP center round tip 80%>
+If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
+</WRAP>
+If programming was successful, you should be seeing messages appear on the terminal window. After programming the AD7780 device, the program will automatically read the value of the analog voltage input and print it via UART.
 ===== Using the reference design =====
 ==== Functional Description ====
+=== Avnet LX-9 MicroBoard and Digilent Nexys3 ===
 The reference design is a custom communication interface, allowing control for the **FILTER**, **GAIN**, **PDRST** pins, **reading data** from the AD7780 and **generating an interrupt** when data has been received.
-<note important>
+=== Avnet ZedBoard ===
-  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.
-  * Reference voltage is 3300 mV default. If using another reference voltage, please check that the jumpers are properly set on the PmodAD3, and modify the reference voltage in the software application using UART (select option [5]).
+The reference design is a custom communication interface, **reading data** from the AD7780 and **generating an interrupt** when data has been received. DMA transfers 256 samples from the ADC and prints the input voltage via UART. **FILTER**, **GAIN** and **PDRST** are hardcoded to '1', but can be easily programmed by adding links from your custom HDL to the inputs of the IPCore.
-</note>
+<WRAP round 80% important>
+  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board.
+  * Reference voltage is 3300 mV default. If using another reference voltage, please check that the jumpers are properly set on the PmodAD3, and modify the reference voltage in the software application using UART (select option [r]).
+  * If using 3 external signals (AVDD, AIN and REF) then 2 jumpers on PmodAD3 must be off (JP1 and JP2).
+  * If using 2 external signals (AIN and REF) or (AIN and AVDD) then 1 jumper on PmodAD3 must be off (JP2 or JP1).
+  * Be aware that 0.5V ≤ Vref ≤ AVDD and 2.7V ≤ AVDD ≤ 5.25V.
+  * Be aware (especially when using gain = 128) that the common-mode voltage (AIN(+) + AIN(−)) / 2 must be ≥ 0.5V.
+</WRAP>
 ===== Downloads =====
-<WRAP round download 50%>
-{{:resources:fpga:xilinx:pmod:ad7780_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}} \\
+<WRAP round download 80%>
-{{:resources:fpga:xilinx:pmod:ad7780_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\
+\\
+**Avnet LX-9 MicroBoard: **\\
+    * {{:resources:fpga:xilinx:pmod:ad7780_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
+**Digilent Nexys™3:**\\
+    * {{:resources:fpga:xilinx:pmod:ad7780_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\
+**Avnet ZedBoard:**\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD3/cf_ad7780_zed|XPS Project]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD3/cf_lib/edk/pcores/axi_ad7780_v1_00_a|AD7780 IPCore]] \\
+    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib|Required Project Libraries]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD3|PmodAD3 Driver Files]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD3/bin|Programming Script]]\\
 </WRAP>
+<wrap hide>
+====== Linux Device Driver - Custom HDL PCore ======
+Connect PmodAD3 to the JD1 connector of the ZedBoard (upper row of pins).
+===== Preparing the SD Card =====
+In order to prepare the SD Card for booting Linux on the ZedBoard:
+    * Download the device tree: [[https://github.com/analogdevicesinc/no-OS/blob/master/Pmods/PmodAD3/dts/zynq-zed-adv7511-pmod-ad3-ipcore.dts|PmodAD3 Linux devicetree]]
+    * Download the Xilinx XPS project: [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD3/cf_ad7780_zed|PmodAD3 Linux XPS Project]]
+    * Download the AD7780 IPcore: [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodAD3/cf_lib/edk/pcores/axi_ad7780_v1_00_a|AD7780 IPCore]] \\
+    * Download the project libraries: [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib|Required Project Libraries]]\\
+    * Follow the instructions on the following wiki page, but use the device tree and project downloaded on the previous step
+        * [[/resources/tools-software/linux-drivers/platforms/zynq?s=adv7511&s=linux|Linux with HDMI video output on the ZED and ZC702]].
+Make sure you have an HDMI monitor connected to the ZedBoard, plug in the SD Card and power on the board.
+If everything is correct, the system should boot up. If you don't have an HDMI monitor, connect to the board via UART, Baud Rate 115200.
+There are 2 ways to test the driver.
+    * Using the terminal window
+    * Using the ADI IIO Oscilloscope
+===== Using the terminal window =====
+Open a new terminal window by pressing **Ctrl+Alt+T**.
+Navigate to the location of the device and identify it using the following commands:
+<code>
+cd /sys/bus/iio/devices/
+ls
+iio:device0 iio:device1 trigger0
+cd iio\:device0
+cat name
+AD7780
+</code>
+If the **cat name** command doesn't return **ad7780**, then change the number of the iio:device, and check again.
+<code>
+cd ..
+cd iio\:device1
+cat name
+</code>
+To see the list of options that the AD7780 driver provides, type:
+<code>
+ls
+buffer  dev  name  power  scan_elements  subsystem  uevent
+</code>
+To read the raw input voltage, type:
+<code>
+cd buffer
+echo 40 > length
+echo 1 > enable
+hexdump -x /dev/iio\:device0
+0000000    d34d    7d63    d44d    7d63    d04d    7d63    c84d    7d63
+0000010    d44d    7d63    d74d    7d63    e04d    7d63    d84d    7d63
+</code>
+{{:resources:fpga:xilinx:pmod:ad7780_custom_linaro_terminal.jpg?600|AD7780 Read Voltage from Terminal}}
+The commands written above can also be used if not using an HDMI monitor and a wireless keyboard, by using a serial terminal, and typing the commands after the system boot-up is complete.
+{{:resources:fpga:xilinx:pmod:ad7780_custom_linux_serial.jpg?600|AD7780 Read Voltage from Serial Terminal}}
+===== Using the ADI IIO Oscilloscope =====
+Install the ADI IIO Oscilloscope using the instructions from the following wiki page:
+    * [[/resources/tools-software/linux-software/iio_oscilloscope|IIO Oscilloscope]]
+Launch the ADI IIO Oscilloscope.
+Select **AD7780** from the **Device** drop-down menu. Set the desired number of samples in the **Sample Count** tab. Click the **Green Play Button** in order to start capturing and displaying data. Click **Stop** to stop the process.
+{{:resources:fpga:xilinx:pmod:ad7780_custom_iio_plot.jpg?600|AD7780 IIO Oscilloscope Plot}}
+</wrap>
 ===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}

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