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resources:fpga:xilinx:pmod:ad7193 [10 Dec 2012 15:51] – Download Wrapper Alexandru.Tofanresources:fpga:xilinx:pmod:ad7193 [22 Feb 2013 12:18] – archive and pictures Alexandru.Tofan
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 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\+<WRAP round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
 If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details. If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.
-</note>+</WRAP>
 Extract the project from the archive file (AD7193_<board_name>.zip) to the location you desire.  Extract the project from the archive file (AD7193_<board_name>.zip) to the location you desire. 
  
 ==== Avnet LX9 MicroBoard Setup ==== ==== Avnet LX9 MicroBoard Setup ====
  
-To begin, connect the PmodAD5 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+To begin, connect the PmodAD5 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
 {{:resources:fpga:xilinx:pmod:pmodad5.jpg?200|PmodAD5 and LX-9}} {{:resources:fpga:xilinx:pmod:pmodad5.jpg?200|PmodAD5 and LX-9}}
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 ==== Digilent Nexys™3 Spartan-6 FPGA Board ==== ==== Digilent Nexys™3 Spartan-6 FPGA Board ====
  
-To begin, connect the PmodAD5 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+To begin, connect the PmodAD5 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
  
 {{:resources:fpga:xilinx:pmod:pmodad5_nexys3.jpg?200|PmodAD5 and Nexys™3}} {{:resources:fpga:xilinx:pmod:pmodad5_nexys3.jpg?200|PmodAD5 and Nexys™3}}
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 If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD7193, the program will display the values of all internal registers. After that, it will go through 5 Demo Modes.  If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD7193, the program will display the values of all internal registers. After that, it will go through 5 Demo Modes. 
  
-{{:resources:fpga:xilinx:pmod:pmodad5demo1.jpg?600|Display internal registers values}}\\+{{:resources:fpga:xilinx:pmod:pmodad5_menu1.jpg?600|Display internal registers values}}\\
  
 **Read Voltage Values referenced to AINCOM, UNIPOLAR Mode.** **Read Voltage Values referenced to AINCOM, UNIPOLAR Mode.**
  
-{{:resources:fpga:xilinx:pmod:pmodad5demo2.jpg?600|Demo mode 1}}\\+{{:resources:fpga:xilinx:pmod:pmodad5_menu2.jpg?600|Demo mode 1}}\\
  
 **Read Voltage Values referenced to AINCOM, BIPOLAR Mode.** **Read Voltage Values referenced to AINCOM, BIPOLAR Mode.**
  
-{{:resources:fpga:xilinx:pmod:pmodad5demo3.jpg?600|Demo mode 2}}\\+{{:resources:fpga:xilinx:pmod:pmodad5_menu3.jpg?600|Demo mode 2}}\\
  
 **Read Differential Voltage Values, UNIPOLAR Mode.** **Read Differential Voltage Values, UNIPOLAR Mode.**
  
-{{:resources:fpga:xilinx:pmod:pmodad5demo4.jpg?600|Demo mode 3}}\\+{{:resources:fpga:xilinx:pmod:pmodad5_menu4.jpg?600|Demo mode 3}}\\
  
 **Read Differential Voltage Values, BIPOLAR Mode.** **Read Differential Voltage Values, BIPOLAR Mode.**
  
-{{:resources:fpga:xilinx:pmod:pmodad5demo5.jpg?600|Demo mode 4}}\\+{{:resources:fpga:xilinx:pmod:pmodad5_menu5.jpg?600|Demo mode 4}}\\
  
 **Read Die Temperature Value.** **Read Die Temperature Value.**
  
-{{:resources:fpga:xilinx:pmod:pmodad5demo6.jpg?600|Demo mode 5}}\\+{{:resources:fpga:xilinx:pmod:pmodad5_menu6.jpg?600|Demo mode 5}}\\
  
 ===== Using the reference design ===== ===== Using the reference design =====
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 The hardware SPI access allows sending and receiving data from the AD7193, programming its internal registers in order to decide which channels should be converted corresponding to AINCOM or its own differential pair, what GAIN, sampling frequency, etc. The hardware SPI access allows sending and receiving data from the AD7193, programming its internal registers in order to decide which channels should be converted corresponding to AINCOM or its own differential pair, what GAIN, sampling frequency, etc.
  
-<note important>+<WRAP round important 80%>
   * Connecting the PmodAD5 to the boards using an extension cable provides ease of use.   * Connecting the PmodAD5 to the boards using an extension cable provides ease of use.
   * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.   * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.
-  * Reference voltage is 2.5V+  * When using AVDD > DVDD (= 3.3V), JP1 on PmodAD5 must be removed. The range for AVDD is 3.0V ≤ AVDD ≤ 5.25V
   * If using Xilinx Software Development Kit integrated Console as a Hyperterminal clinet, please uncomment all the commented **getchar();** in main.c, because the Console sees [Enter] as 2 consecutive keypresses, so 2 getchar(); are required. If using Tera Term or other similar software, do not modify anything.    * If using Xilinx Software Development Kit integrated Console as a Hyperterminal clinet, please uncomment all the commented **getchar();** in main.c, because the Console sees [Enter] as 2 consecutive keypresses, so 2 getchar(); are required. If using Tera Term or other similar software, do not modify anything. 
-</note>+</WRAP>
  
  
 ===== Downloads ===== ===== Downloads =====
-<WRAP round download 50%>+<WRAP round download 80%>
 {{:resources:fpga:xilinx:pmod:ad7193_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}} \\ {{:resources:fpga:xilinx:pmod:ad7193_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}} \\
 {{:resources:fpga:xilinx:pmod:ad7193_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\ {{:resources:fpga:xilinx:pmod:ad7193_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\
resources/fpga/xilinx/pmod/ad7193.txt · Last modified: 09 Jan 2021 00:49 by Robin Getz