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— | resources:fpga:xilinx:pmod:ad7193 [08 Jun 2012 16:56] – Approved Alexandru.Tofan | ||
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+ | ====== AD7193 Pmod Xilinx FPGA Reference Design ====== | ||
+ | |||
+ | ===== Introduction ===== | ||
+ | The [[adi> | ||
+ | The device can be configured to have four differential inputs or eight pseudo differential inputs. The on-chip channel sequencer allows several channels to be enabled simultaneously, | ||
+ | |||
+ | **HW Platform(s): | ||
+ | * [[http:// | ||
+ | * [[http:// | ||
+ | * [[http:// | ||
+ | **System:** Microblaze, AXI, UART \\ | ||
+ | |||
+ | ===== Quick Start Guide ===== | ||
+ | |||
+ | The bit file provided in the project *.zip file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT). | ||
+ | |||
+ | ==== Required Hardware ==== | ||
+ | * [[http:// | ||
+ | * [[http:// | ||
+ | * [[http:// | ||
+ | |||
+ | ==== Required Software ==== | ||
+ | * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | ||
+ | * A UART terminal (Tera Term/ | ||
+ | |||
+ | |||
+ | ==== Running Demo (SDK) Program ==== | ||
+ | |||
+ | <note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http:// | ||
+ | If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http:// | ||
+ | </ | ||
+ | Extract the project from the archive file (AD7193_< | ||
+ | |||
+ | ==== Avnet LX9 MicroBoard Setup ==== | ||
+ | |||
+ | To begin, connect the PmodAD5 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | ==== Digilent Nexys™3 Spartan-6 FPGA Board ==== | ||
+ | |||
+ | To begin, connect the PmodAD5 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | ==== FPGA Configuration ==== | ||
+ | |||
+ | Start IMPACT, and double click " | ||
+ | |||
+ | {{: | ||
+ | |||
+ | If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD7193, the program will display the values of all internal registers. After that, it will go through 3 Demo Modes: Read Voltage Values referenced to AINCOM, Read Differential Voltage Values and Read Die Temperature Value. | ||
+ | |||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | |||
+ | |||
+ | ===== Using the reference design ===== | ||
+ | |||
+ | ==== Functional Description ==== | ||
+ | |||
+ | The reference design is a custom SPI Interface, containing CS, SCLK, MISO, MOSI, but also a GPIO to read the RDY status on the MISO line. The information is displayed on UART. | ||
+ | |||
+ | The hardware SPI access allows sending and receiving data from the AD7193, programming its internal registers in order to decide which channels should be converted corresponding to AINCOM or its own differential pair, what GAIN, sampling frequency, etc. | ||
+ | |||
+ | <note important> | ||
+ | * Connecting the PmodAD5 to the boards using an extension cable provides ease of use. | ||
+ | * UART must be set to 57600 baudrate. | ||
+ | * Reference voltage is 2.5V | ||
+ | * If using Xilinx Software Development Kit integrated Console as a Hyperterminal clinet, please uncomment all the commented **getchar(); | ||
+ | </ | ||
+ | |||
+ | |||
+ | ===== Downloads ===== | ||
+ | {{: | ||
+ | {{: | ||
+ | |||
+ | |||
+ | ===== More information ===== | ||
+ | * [[ez> | ||
+ | * Example questions: {{rss> |