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resources:fpga:xilinx:pmod:ad7193 [30 Sep 2013 11:56]
Alexandru.Tofan Added ZedBoard
resources:fpga:xilinx:pmod:ad7193 [01 Oct 2013 09:09]
Alexandru.Tofan [Avnet ZedBoard]
Line 49: Line 49:
 ==== Avnet ZedBoard ==== ==== Avnet ZedBoard ====
  
-To begin, connect the PmodAD5 to JD connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).+To begin, connect the PmodAD5 to JA connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
  
 {{:​resources:​fpga:​xilinx:​pmod:​pmodad5_zed.jpg?​200|PmodAD5 and ZedBoard}} {{:​resources:​fpga:​xilinx:​pmod:​pmodad5_zed.jpg?​200|PmodAD5 and ZedBoard}}
Line 105: Line 105:
   * When using AVDD > DVDD (= 3.3V), JP1 on PmodAD5 must be removed. The range for AVDD is 3.0V ≤ AVDD ≤ 5.25V   * When using AVDD > DVDD (= 3.3V), JP1 on PmodAD5 must be removed. The range for AVDD is 3.0V ≤ AVDD ≤ 5.25V
   * If using Xilinx Software Development Kit integrated Console as a Hyperterminal clinet, please uncomment all the commented **getchar();​** in main.c, because the Console sees [Enter] as 2 consecutive keypresses, so 2 getchar(); are required. If using Tera Term or other similar software, do not modify anything. ​   * If using Xilinx Software Development Kit integrated Console as a Hyperterminal clinet, please uncomment all the commented **getchar();​** in main.c, because the Console sees [Enter] as 2 consecutive keypresses, so 2 getchar(); are required. If using Tera Term or other similar software, do not modify anything. ​
 +</​WRAP>​
 +
 +<WRAP round important 80%>
 +When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in "​system_config.h":​
 +
 +<code c>
 +// Select between PS7 or AXI Interface
 +#define USE_PS7 1
 +// SPI used in the design
 +#define USE_SPI 1
 +// I2C used in the design
 +#define USE_I2C 0
 +// Timer (+interrupts) used in the design
 +#define USE_TIMER 0
 +// External interrupts used in the design
 +#define USE_EXTERNAL ​    0
 +// GPIO used in the design
 +#define USE_GPIO ​        0
 +</​code>​
 +
 </​WRAP>​ </​WRAP>​
  
resources/fpga/xilinx/pmod/ad7193.txt · Last modified: 09 Jan 2021 00:49 by Robin Getz