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resources:fpga:xilinx:pmod:ad7091r [03 Jan 2013 20:42]
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resources:fpga:xilinx:pmod:ad7091r [09 Jan 2021 00:49] (current)
Robin Getz user interwiki links
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 **HW Platform(s):​** ​ **HW Platform(s):​** ​
-   * [[http://www.xilinx.com/products/​boards-and-kits/​AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] ​+   * [[xilinx>products/​boards-and-kits/​AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] ​
    * [[http://​www.digilentinc.com/​Products/​Detail.cfm?​NavPath=2,​400,​897&​Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]    * [[http://​www.digilentinc.com/​Products/​Detail.cfm?​NavPath=2,​400,​897&​Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
-   * [[http://​www.digilentinc.com/Products/Detail.cfm?​Prod=PMOD-AD6|PmodAD6 (Digilent)]] \\ +   * [[http://​www.em.avnet.com/en-us/design/​drc/​Pages/​Zedboard.aspx|Avnet ZedBoard]] \\
-**System:** Microblaze, AXI, UART \\+
  
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
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 ==== Required Hardware ==== ==== Required Hardware ====
-  * [[http://www.xilinx.com/products/​boards-and-kits/​AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] ​  ​ +  * [[xilinx>products/​boards-and-kits/​AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] 
-  * [[http://​www.digilentinc.com/​Products/​Detail.cfm?​NavPath=2,​400,​897&​Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]+  * [[http://​www.digilentinc.com/​Products/​Detail.cfm?​NavPath=2,​400,​897&​Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]] ​  
 +  * [[http://​www.em.avnet.com/​en-us/​design/​drc/​Pages/​Zedboard.aspx|Avnet ZedBoard]]  ​
   * [[http://​www.digilentinc.com/​Products/​Detail.cfm?​Prod=PMOD-AD6|PmodAD6 (Digilent)]]   * [[http://​www.digilentinc.com/​Products/​Detail.cfm?​Prod=PMOD-AD6|PmodAD6 (Digilent)]]
  
 ==== Required Software ==== ==== Required Software ====
-  * Xilinx ISE 13.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). 
-  * A UART terminal (Tera Term/​Hyperterminal),​ Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.+  * A UART terminal (Tera Term/​Hyperterminal),​ Baud rate 115200 for the Avnet LX-9 Microboard ​and ZedBoard ​or 9600 for the Digilent Nexys™3 Board.
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<WRAP tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/​boards-and-kits/​AES-S6MB-LX9.htm]] for details.\\ +<​WRAP ​center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/​boards-and-kits/​AES-S6MB-LX9.htm]] for details.\\ 
-If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://​www.digilentinc.com/​Products/​Detail.cfm?​NavPath=2,​400,​897&​Prod=NEXYS3]] for details. +If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://​www.digilentinc.com/​Products/​Detail.cfm?​NavPath=2,​400,​897&​Prod=NEXYS3]] for details.\\ 
-</​WRAP>​ +If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://​www.em.avnet.com/​en-us/​design/​drc/​Pages/​Zedboard.aspx]] for details.</​WRAP>​
-Extract the project from the archive file (AD7091R_<​board_name>​.zip) to the location you desire. ​+
  
 ==== Avnet LX9 MicroBoard Setup ==== ==== Avnet LX9 MicroBoard Setup ====
  
-To begin, connect the PmodAD6 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+Extract the project from the archive file (AD7091R_<​board_name>​.zip) to the location you desire.  
 + 
 +To begin, connect the PmodAD6 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
 {{:​resources:​fpga:​xilinx:​pmod:​pmodad6.jpg?​200|PmodAD6 and LX-9}} {{:​resources:​fpga:​xilinx:​pmod:​pmodad6.jpg?​200|PmodAD6 and LX-9}}
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 ==== Digilent Nexys™3 Spartan-6 FPGA Board ==== ==== Digilent Nexys™3 Spartan-6 FPGA Board ====
  
-To begin, connect the PmodAD6 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+Extract the project from the archive file (AD7091R_<​board_name>​.zip) to the location you desire.  
 + 
 +To begin, connect the PmodAD6 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
  
 {{:​resources:​fpga:​xilinx:​pmod:​pmodad6_nexys3.jpg?​200|PmodAD6 and Nexys™3}} {{:​resources:​fpga:​xilinx:​pmod:​pmodad6_nexys3.jpg?​200|PmodAD6 and Nexys™3}}
  
-==== FPGA Configuration ====+==== Avnet ZedBoard ==== 
 + 
 +To begin, connect the PmodAD6 to JD connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:​resources:​fpga:​xilinx:​pmod:​pmodad6_zed.jpg?​200|PmodAD6 and ZedBoard}} 
 + 
 +==== FPGA Configuration ​for Nexys3 and LX-9 MicroBoard ​====
  
 Start IMPACT, and double click "​Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal and then program the device using the bit file provided in the project *.zip archive, located in the "​sw"​ folder (../​ad7091R/​sw/​AD7091R.bit). Start IMPACT, and double click "​Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal and then program the device using the bit file provided in the project *.zip archive, located in the "​sw"​ folder (../​ad7091R/​sw/​AD7091R.bit).
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 {{:​resources:​fpga:​xilinx:​pmod:​PmodAD5impact.jpg?​200|Programming FPGA in IMPACT}} {{:​resources:​fpga:​xilinx:​pmod:​PmodAD5impact.jpg?​200|Programming FPGA in IMPACT}}
  
-If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD7091R, ​the program ​will display ​the value of the input voltage. Pressing [Enter] will perform another conversion and display the result.+If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD7091R, ​you will be asked you to set the value of VREF
  
-{{:​resources:​fpga:​xilinx:​pmod:​pmodad6demo1.jpg?​600|UART messeges}}+{{:​resources:​fpga:​xilinx:​pmod:​pmodad6_menu1.jpg?​600|UART messeges}} 
 + 
 +If you use the default VREF(=2.5V) then just press [Enter] and the program will display the value of the input voltage. Pressing any key will perform another conversion and display the result. 
 + 
 +{{:​resources:​fpga:​xilinx:​pmod:​pmodad6_menu2.jpg?​600|UART messeges}} 
 + 
 +Here are some of the errors that can appear while trying to introduce a wrong value for VREF. 
 +If any value besides 1 to 9 is entered, an error message will be displayed. If a value higher than 5250 or lower than 2700 is entered, an error message will be displayed. If entering less than 4 characters, please press [Enter] in order to validate your input. If 4 characters are entered, the result is automatically validated. 
 + 
 +{{:​resources:​fpga:​xilinx:​pmod:​pmodad6_menu3.jpg?​600|UART messeges}} 
 + 
 + 
 +==== FPGA Configuration for ZedBoard ==== 
 + 
 +Run the **download.bat** script from the "​../​bin"​ folder downloaded from the github (see the links in the download section of the wiki page).  
 +The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards. 
 + 
 +<WRAP center round tip 80%> 
 +If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path. 
 +</​WRAP>​ 
 + 
 +If programming was successful, you should be seeing messages appear on the terminal window. The software is programmed with VRef = 2.5 V. If you wish to change Vref, you must modify its value in main.c.
  
 ===== Using the reference design ===== ===== Using the reference design =====
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 ==== Functional Description ==== ==== Functional Description ====
  
-The reference design is a custom SPI Interface, containing CS, SCLK, MISO, and a CONVST signal.+=== Avnet LX-9 MicroBoard ​and Digilent Nexys3 ===
  
-The hardware SPI access allows receiving data from the AD7091R.+The reference design is a custom SPI Interface, containing CS, SCLK, MISO, and a CONVST signal. ​The hardware SPI access allows receiving data from the AD7091R. The software programs the device, and afterwards, prints the input voltage value via UART.
  
-<WRAP important>​+=== Avnet ZedBoard === 
 + 
 +The reference design is a custom SPI Interface, containing CS, SCLK, MISO, and a CONVST signal. The hardware SPI access allows receiving data from the AD7091R. The software programs the device, and afterwards, using DMA, transfers 8192 samples and prints the input voltage value via UART. 
 + 
 +<​WRAP ​round important ​80%>
   * Connecting the PmodAD6 to the boards using an extension cable provides ease of use.   * Connecting the PmodAD6 to the boards using an extension cable provides ease of use.
-  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board. +  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard ​and ZedBoard ​or 9600 Baud Rate for the Digilent Nexys™3 Board. 
-  * Reference voltage ​is 2.5V+  * When using AVDD > DVDD (= 3.3V), JP1 on PmodAD6 must be removed and the external AVDD signal must be connected to J2 Pin 1. The range for AVDD is 2.7V ≤ AVDD ≤ 5.25V. 
 +  * When using external VREF, connect the VREF signal to J2 Pin 3. The range for external VREF is 2.7V ≤ VREF ≤ AVDD. 
 </​WRAP>​ </​WRAP>​
  
  
 ===== Downloads ===== ===== Downloads =====
-<WRAP round download ​50%> + 
-{{:​resources:​fpga:​xilinx:​pmod:​ad7091r_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}} \\ +<WRAP round download ​80%> 
-{{:​resources:​fpga:​xilinx:​pmod:​ad7091r_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\+\\ 
 +**Avnet LX-9 MicroBoard: **\\ 
 +    * {{:​resources:​fpga:​xilinx:​pmod:​ad7091r_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\ 
 + 
 +**Digilent Nexys™3:​**\\ 
 +    * {{:​resources:​fpga:​xilinx:​pmod:​ad7091r_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} \\ 
 + 
 +**Avnet ZedBoard:​**\\ 
 +    * [[https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​Pmods/​PmodAD6/​cf_ad7091r_zed|XPS Project]]\\ 
 +    * [[https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​Pmods/​PmodAD6/​cf_lib/​edk/​pcores/​axi_ad7091r_v1_00_a|AD7091R IPCore]] \\ 
 +    * [[https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_lib|Required Project Libraries]]\\ 
 +    * [[https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​Pmods/​PmodAD6|PmodAD6 Driver Files]]\\ 
 +    * [[https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​Pmods/​PmodAD6/​bin|Programming Script]]\\ 
 +    ​
 </​WRAP>​ </​WRAP>​
 +<wrap hide>
 +====== Linux Device Driver - Custom HDL PCore ======
 +
 +Connect PmodAD6 to the JD1 connector of the ZedBoard (upper row of pins).
 +
 +===== Preparing the SD Card =====
 +
 +In order to prepare the SD Card for booting Linux on the ZedBoard:
 +    * Download the device tree: [[https://​github.com/​analogdevicesinc/​no-OS/​blob/​master/​Pmods/​PmodAD6/​dts/​zynq-zed-adv7511-pmod-ad6-ipcore.dts|PmodAD6 Linux devicetree]]
 +    * Download the Xilinx XPS project: [[https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​Pmods/​PmodAD6/​cf_ad7980_zed|PmodAD6 Linux XPS Project]]
 +    * Download the AD7091R IPcore: [[https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​Pmods/​PmodAD6/​cf_lib/​edk/​pcores/​axi_ad7091r_v1_00_a|AD7091R IPCore]] \\
 +    * Download the project libraries: [[https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_lib|Required Project Libraries]]\\
 +    * Follow the instructions on the following wiki page, but use the device tree and project downloaded on the previous step
 +        * [[/​resources/​tools-software/​linux-drivers/​platforms/​zynq?​s=adv7511&​s=linux|Linux with HDMI video output on the ZED and ZC702]].
 +
 +Make sure you have an HDMI monitor connected to the ZedBoard, plug in the SD Card and power on the board.
 +If everything is correct, the system should boot up. If you don't have an HDMI monitor, connect to the board via UART, Baud Rate 115200.
 +
 +There are 2 ways to test the driver.
 +    * Using the terminal window
 +    * Using the ADI IIO Oscilloscope
 +
 +===== Using the terminal window =====
 +
 +Open a new terminal window by pressing **Ctrl+Alt+T**.
 +
 +Navigate to the location of the device and identify it using the following commands:
 +<​code>​
 +cd /​sys/​bus/​iio/​devices/​
 +ls
 +iio:device0 iio:device1 trigger0
 +cd iio\:​device0
 +cat name
 +AD7091R
 +</​code>​
 +
 +If the **cat name** command doesn'​t return **ad7091r**,​ then change the number of the iio:device, and check again.
 +<​code>​
 +cd ..
 +cd iio\:​device1
 +cat name
 +</​code>​
 +
 +To see the list of options that the AD7980 driver provides, type:
 +<​code>​
 +ls
 +buffer ​ dev  name  power  scan_elements ​ subsystem ​ uevent
 +</​code>​
 +
 +To read the raw input voltage, type:
 +<​code>​
 +cd buffer
 +echo 128 > length
 +echo 1 > enable
 +hexdump -x /​dev/​iio\:​device0
 +0000000 ​   0000    dc3e    0000    dc1b    0000    dc3f    0000    dc4a
 +0000010 ​   0000    dc2c    0000    dc3e    0000    dc25    0000    dc3d
 +0000020 ​   0000    dc38    0000    dc2f    0000    dc2c    0000    dc22
 +0000030 ​   0000    dc03    0000    dc1a    0000    dbfe    0000    dbff
 +0000040 ​   0000    dc25    0000    dc29    0000    dc22    0000    dc05
 +0000050 ​   0000    dc20    0000    dc2a    0000    dc09    0000    dc2e
 +0000060 ​   0000    dc12    0000    dc0c    0000    dc2c    0000    dc2b
 +0000070 ​   0000    dc3b    0000    dc2f    0000    dc2a    0000    dc14
 +</​code>​
 +
 +{{:​resources:​fpga:​xilinx:​pmod:​ad7091r_custom_linaro_terminal.jpg?​600|AD7091R Read Voltage from Terminal}}
 +
 +The commands written above can also be used if not using an HDMI monitor and a wireless keyboard, by using a serial terminal, and typing the commands after the system boot-up is complete.
 +
 +{{:​resources:​fpga:​xilinx:​pmod:​ad7091r_custom_linux_serial.jpg?​600|AD7091R Read Voltage from Serial Terminal}}
 +
 +===== Using the ADI IIO Oscilloscope =====
 +
 +Install the ADI IIO Oscilloscope using the instructions from the following wiki page:
 +    * [[/​resources/​tools-software/​linux-software/​iio_oscilloscope|IIO Oscilloscope]]
 +
 +Launch the ADI IIO Oscilloscope.
  
 +Select **AD7091R** from the **Device** drop-down menu. Set the desired number of samples in the **Sample Count** tab. Click the **Green Play Button** in order to start capturing and displaying data. Click **Stop** to stop the process.
  
 +{{:​resources:​fpga:​xilinx:​pmod:​ad7091r_custom_iio_plot.jpg?​600|AD7091R IIO Oscilloscope Plot}}
 +</​wrap>​
 ===== More information ===== ===== More information =====
   * [[ez>​community/​fpga|ask questions about the FPGA reference design]]   * [[ez>​community/​fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>​http://​ez.analog.com/​community/​feeds/​allcontent/​atom?​community=2061 5 author 1d}}   * Example questions: {{rss>​http://​ez.analog.com/​community/​feeds/​allcontent/​atom?​community=2061 5 author 1d}}
resources/fpga/xilinx/pmod/ad7091r.1357242155.txt.gz · Last modified: 22 Feb 2013 12:15 (external edit)