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resources:fpga:xilinx:interposer:ucprobe_common [16 Feb 2012 09:23]
acozma created
resources:fpga:xilinx:interposer:ucprobe_common [03 Jan 2013 20:42] (current)
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 ===== Hardware Setup ===== ===== Hardware Setup =====
  
-<note important>​Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</note>+<WRAP important>​Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</WRAP>
  
   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
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 ===== Load and Run the Demonstration Project ===== ===== Load and Run the Demonstration Project =====
  
-  * Click the **//​Open//​** option from the **uC-Probe** menu and select the file **//ucProbeInterface/​AD5415_Interface.wsp//** provided within the reference design files.+  * Click the **//​Open//​** option from the **uC-Probe** menu and select the **//​.wsp//​** ​file from the **//​ucProbeInterface//​** folder ​provided within the reference design files.
  
   * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. Select the file **//​ucProbeInterface/​ADIEvalBoard.elf//​** to be loaded as a symbol file.   * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. Select the file **//​ucProbeInterface/​ADIEvalBoard.elf//​** to be loaded as a symbol file.
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 {{ :​resources:​fpga:​altera:​bemicro:​image081.png?​200 }} {{ :​resources:​fpga:​altera:​bemicro:​image081.png?​200 }}
  
-<note tip>  ​+<WRAP tip>  ​
   * In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the **//​Stop//​** button and run it again by pressing the **//​Play//​** button.   * In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the **//​Stop//​** button and run it again by pressing the **//​Play//​** button.
   * After starting the uC-Probe interface wait until the status of the connection with the board displayed on the bottom of the screen is set to //​**Connected**//​. It is possible to use the interface only after the status is changed to //​**Connected**//​ and the data transfer speed displayed next to the connection status is different than 0.   * After starting the uC-Probe interface wait until the status of the connection with the board displayed on the bottom of the screen is set to //​**Connected**//​. It is possible to use the interface only after the status is changed to //​**Connected**//​ and the data transfer speed displayed next to the connection status is different than 0.
-</note>+</WRAP>
  
resources/fpga/xilinx/interposer/ucprobe_common.txt · Last modified: 03 Jan 2013 20:42 (external edit)