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resources:fpga:xilinx:interposer:cn0194 [16 Nov 2012 17:41]
larsc [Evaluation Boards]
resources:fpga:xilinx:interposer:cn0194 [27 Nov 2013 11:04] (current)
LucianS changed source code (without Micrium uC-Probe), added Software Setup, remove programming with Impact
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>​EVAL-CN0194-SDPZ|EVAL-CN0194-SDPZ]]** evaluation board together with the Xilinx KC705 FPGA boardthe Xilinx Embedded Development Kit (EDK) and the [[http://​micrium.com/​page/​products/​tools/​probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-CN0194-SDPZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>​EVAL-CN0194-SDPZ|EVAL-CN0194-SDPZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-CN0194-SDPZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :​resources:​fpga:​xilinx:​interposer:​cn0194.jpg?​600 }} {{ :​resources:​fpga:​xilinx:​interposer:​cn0194.jpg?​600 }}
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   * [[adi>/​static/​imported-files/​circuit_notes/​CN0194.pdf|EVAL-CN0194-SDPZ evaluation board user guide]]   * [[adi>/​static/​imported-files/​circuit_notes/​CN0194.pdf|EVAL-CN0194-SDPZ evaluation board user guide]]
   * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://​micrium.com/​page/​products/​tools/​probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack)+  * Xilinx ISE 14.6
-  * [[http://micrium.com/​page/​products/​tools/​probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal),​ baud rate 115200. 
 +  * The EVAL-CN0194 reference project for Xilinx KC705 FPGA. 
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:​fpga:xilinx:​interposer:​cn0194_evalboard.zip|Reference Design Files}} +\\ 
- +  * **AD7685 Driver:** https://github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_drivers/​AD7685 
-The following table presents a short description the reference design archive contents. +  * **CN0194 Commands:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_commands/​CN0194 
- +  ​* **Xilinx Boards Common Drivers:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​platform_drivers/​Xilinx/​SDP_Common 
-**Folder** **Description** +  * **EDK KC705 Reference ​project:** https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_sdp_kc705 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation| +\\ 
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +</​WRAP>​
-| Software | Contains the source files of the software ​project ​that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
-{{page>​ucprobe_common}} +===== Hardware setup =====
- +
-===== Demonstration Project User Interface ​===== +
- +
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-CN0194-SDPZ** evaluation board. +
- +
-{{ :​resources:​fpga:​altera:​bemicro:​cn0194_interface.png?​400 }}+
  
-**Section A** is used to activate ​the board and monitor activity. The communication with the board is activated / deactivated by toggling ​the **//​ON/​OFF//​** switch. The **//​Activity//​** LED turns green when the communication is active. If the **//​ON/​OFF//​** switch ​is set to **//ON//** and the **//​Activity//​** LED is **//​BLACK//​** it means that there is a communication problem with the boardSee the **Troubleshooting** section for indications ​on how to fix the communication problems.+<WRAP round important 80%> 
 +\\ 
 +Before connecting ​the ADI evaluation ​board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details ​on how to change ​the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</​WRAP>​
  
-**Section B** is used to acquire data from the two AD7685 converters. +  ​Use the FMC-SDP interposer ​to connect ​the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector
-  * Acquire One Sample button initiates one conversion and displays ​the result for each channel+  * Connect ​the JTAG and UART cables to the KC705 and power up the FPGA board.
-  * Acquire 1000 Samples button initiates 1000 conversions from each channel and displays ​the acquisition time (in microseconds) for this operation. To save the conversion results run the //​**ADIEvalBoard/​uCProbe/​data_capture.bat**//​ script; the data captured from the two converters will be saved into two comma separated values (.csv) files named **//​Acquisition1.csv//​** ​and **//​Acquisition2.csv//​**,​ located in the same folder as the //​**data_capture.bat**//​ file. **//​Acquisition1.csv//​** will contain the values from the channel 1 and **//​Acquisition2.csv//​** will contain the values from the channel 2.+
  
-{{ :resources:​fpga:​altera:​bemicro:​cn0194_tcl.png?500 }}+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-CN0194 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **adcCode?​** | Displays the ADC Code for selected channel. Accepted values:\\ 1 - channel 1.\\ 2 - channel 2. | 
 +| **voltage?** | Displays the input voltage for selected channel. Accepted values:\\ 1 - channel 1.\\ 2 - channel 2. |
  
-===== Troubleshooting =====+  
 +Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-In case there is communication problem with the board the follwing actions can be perfomed ​in order to try to fix the issues: +The following image shows generic list of commands ​in a serial terminal connected ​to Xilinx KC705 FPGA'​s ​UART peripheral
-  * Check that the evaluation board is powered as instructed in the board'​s ​user guide+{{ :​resources:​fpga:​xilinx:​interposer:​Terminal_KC705.jpg? }}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//​**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 +===== Software Project Setup =====
 +{{page>​import_workspace}}
 ====== More information ====== ====== More information ======
 {{page>​ez_common}} {{page>​ez_common}}
resources/fpga/xilinx/interposer/cn0194.txt · Last modified: 27 Nov 2013 11:04 by LucianS