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resources:fpga:xilinx:interposer:cn0189 [16 Nov 2012 17:32]
larsc [Evaluation Boards]
resources:fpga:xilinx:interposer:cn0189 [25 Nov 2013 09:54] (current)
LucianS changed source code (without Micrium uC-Probe), added Software Setup, remove programming with Impact
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>​EVAL-CN0189-SDPZ|EVAL-CN0189-SDPZ]]** evaluation board together with the Xilinx KC705 FPGA boardthe Xilinx Embedded Development Kit (EDK) and the [[http://​micrium.com/​page/​products/​tools/​probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-CN0189-SDPZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>​EVAL-CN0189-SDPZ|EVAL-CN0189-SDPZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-CN0189-SDPZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :​resources:​fpga:​xilinx:​interposer:​cn0189.jpg?​600 }} {{ :​resources:​fpga:​xilinx:​interposer:​cn0189.jpg?​600 }}
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   * [[adi>/​static/​imported-files/​circuit_notes/​CN0189.pdf|EVAL-CN0189-SDPZ evaluation board user guide]]   * [[adi>/​static/​imported-files/​circuit_notes/​CN0189.pdf|EVAL-CN0189-SDPZ evaluation board user guide]]
   * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://​micrium.com/​page/​products/​tools/​probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack)+  * Xilinx ISE 14.6
-  * [[http://micrium.com/​page/​products/​tools/​probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal),​ baud rate 115200. 
 +  * The EVAL-CN0189 reference project for Xilinx KC705 FPGA. 
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:​fpga:xilinx:​interposer:​cn0189_evalboard.zip|Reference Design Files}} +\\ 
- +  * **AD7887 Driver:** https://github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_drivers/​AD7887 
-The following table presents a short description the reference design archive contents. +  * **CN0189 Commands:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_commands/​CN0189 
- +  ​* **Xilinx Boards Common Drivers:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​platform_drivers/​Xilinx/​SDP_Common 
-**Folder** **Description** +  * **EDK KC705 Reference ​project:** https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_sdp_kc705 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation| +\\ 
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +</​WRAP>​
-| Software | Contains the source files of the software ​project ​that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
-{{page>​ucprobe_common}} +===== Hardware setup =====
- +
-===== Demonstration Project User Interface ​===== +
- +
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-CN0189-SDPZ** evaluation board.+
  
-{{ :​resources:​fpga:​xilinx:​interposer:​cn0189_interface.jpg?600 }}+<WRAP round important 80%> 
 +\\ 
 +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</​WRAP>​
  
-The communication with the board is activated / deactivated by toggling ​the **//​ON/​OFF//​** switchThe **//​Activity//​** LED turns green when the communication is active. If the **//​ON/​OFF//​** switch is set to **//​ON//​** ​and the **//​Activity//​** LED is **//​BLACK//​** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems.+  * Use the FMC-SDP interposer to connect the ADI evaluation ​board to the Xilinx KC705 board on the FMC LPC connector. 
 +  ​Connect ​the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-The **MEASUREMENTS** section shows the raw data read from the AD7887 as well as the corrected ​data, the acceleration on the X and Y axis and the rotations on the X and Y axis - asin(x) and acos(y)The data corrections are performed using the offsets and gains shown in the **//​Calibration parameters//​** section. At any time a new calibration ​can be performed to update the calibration parametersA new calibration is started by setting the **//Run calibration//​** switch to ONThis will cause the **//​Calibration status ​Running//** LED and also the LED corresponding to the current ​calibration ​step to be litA calibration is done by taking 4 data readings in the following conditions: +===== Reference Project Overview ===== 
-  Maximum positive acceleration (+1g) on the X axis and zero acceleration on the Y axis +The following commands were implemented in this version of EVAL-CN0189 reference project for Xilinx KC705 FPGA board. 
-  ​Maximum negative acceleration (-1g) on the X axis and zero acceleration on the Y axis +^ Command ^ Description ^ 
-  ​Maximum positive acceleration (+1g) on the Y axis and zero acceleration on the X axis +**help?** | Displays all available commands. | 
-  ​Maximum negative acceleration (-1g) on the Y axis and zero acceleration on the X axis +| **calibX+1G!** | Acquire ​data for calibrationwhen Xacc=+1[g]
-When the data readings ​for calibration ​step are stable toggle the **//Move to next step//** switch to move to the next stepWhen all the 4 steps have been completed the **//​Calibration status - Complete//** LED is lit and the new offset and gain values are computed and displayed in the **//​Calibration parameters//​** section. These new values will be used to correct all the subsequent data readingsA calibration ​can be stopped at any time by setting ​the **//Run calibration//​** switch to OFF+**calibX-1G!** | Acquire data for calibration, when Xacc=-1[g]
 +**calibY+1G!** | Acquire data for calibration,​ when Yacc=+1[g]
 +**calibY-1G!** | Acquire data for calibration, when Yacc=-1[g]| 
 +**calibCalculateParam!** | Calculates ​the parameters ​for calibration. | 
 +**rawData?** | Displays ​the raw data an both axes.(40 samples) | 
 +**acceleration?​** | Displays ​the acceleration on both axes.(40 samples) | 
 +**tilt?** | Displays ​the tilt on both axes.(40 samples) | 
 +  
 +Commands ​can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Troubleshooting =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :​resources:​fpga:​xilinx:​interposer:​Terminal_KC705.jpg?​ }}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +===== Software Project Setup ===== 
-  * Check that the evaluation board is powered as instructed in the board'​s user guide. +{{page>​import_workspace}}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//​**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
   * [[resources:​tools-software:​linux-drivers:​iio-adc:​ad7887|AD7887 IIO ADC Linux Driver]]   * [[resources:​tools-software:​linux-drivers:​iio-adc:​ad7887|AD7887 IIO ADC Linux Driver]]
 {{page>​ez_common}} {{page>​ez_common}}
resources/fpga/xilinx/interposer/cn0189.txt · Last modified: 25 Nov 2013 09:54 by LucianS