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- 2_cycles_sync_3_same_setup_3_channels_enabled.png
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- 08 Mar 2022 10:06
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- accessing_ad4130_analysis_window_and_tools.png
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- ad4130_evb_jumper_settings.xlsx
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- ad4130_pyadi-iio-uri-config.png
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- 06 Jul 2022 09:58
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- 13 Dec 2021 13:35
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- 13 Dec 2021 13:17
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- fifo_single_channel_repeat_diagram.svg
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- first_conversion_on_a_new_channel_diagram.png
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- 25 Apr 2022 14:46
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- 14 Feb 2022 15:15
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- timing_fsm.mp4
- 13 Dec 2021 13:18
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- untitled-1.png
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- 13 Dec 2021 12:57
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![[root]](/resources/fpga/xilinx/interposer/cn0188?ns=&tab_files=files&do=media&tab_details=view&image=resources%3Aeval%3Auser-guides%3Acircuits-from-the-lab%3Atimeslot_led.png){kind=link}
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- Date:
- 31 Jan 2022 10:41
- Filename:
- timeslot_led.png
- Format:
- PNG
- Size:
- 24KB
- Width:
- 565
- Height:
- 495
- References for:
- EVAL-ADPD410x-ARDZ User Guide
resources/fpga/xilinx/interposer/cn0188.txt · Last modified: 09 Jan 2021 00:49 by Robin Getz