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![[root]](/resources/fpga/xilinx/interposer/cn0188?ns=&tab_files=files&do=media&tab_details=view&image=resources%3Aeval%3Auser-guides%3Aadin1300-and-adin1200%3Atable8_4level_strapping_resistor_ratios_dp83867.png){kind=link}
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resources:eval:user-guides:adin1300-and-adin1200:table8_4level_strapping_resistor_ratios_dp83867.png
- Date:
- 07 Jan 2022 15:16
- Filename:
- table8_4level_strapping_resistor_ratios_dp83867.png
- Format:
- PNG
- Size:
- 12KB
- Width:
- 502
- Height:
- 215
- References for:
- PHY Exchange Guide, DP83867 to ADIN1300 Gb
resources/fpga/xilinx/interposer/cn0188.txt · Last modified: 09 Jan 2021 00:49 by Robin Getz