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| Both sides previous revisionPrevious revision | Last revisionBoth sides next revision |
| resources:fpga:xilinx:interposer:adf4156 [22 Jul 2019 14:12] – Update no-OS driver link Andrei Drimbarean | resources:fpga:xilinx:interposer:adf4156 [03 Jan 2021 22:12] – fix links Robin Getz |
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| ===== Evaluation Boards ===== | ===== Evaluation Boards ===== |
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| * [[http://www.analog.com/en/rfif-components/pll-synthesizersvcos/adf4156/products/EVAL-ADF4156/eb.html | EVAL-ADF4156SD1Z]] | * [[adi>en/rfif-components/pll-synthesizersvcos/adf4156/products/EVAL-ADF4156/eb.html | EVAL-ADF4156SD1Z]] |
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| ====== Overview ====== | ====== Overview ====== |
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| This document presents the steps to setup an environment for using the **[[http://www.analog.com/en/rfif-components/pll-synthesizersvcos/adf4156/products/EVAL-ADF4156/eb.html|EVAL-ADF4156SD1Z]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-ADF4156SD1Z Evaluation Board with the Xilinx KC705 board. | This document presents the steps to setup an environment for using the **[[adi>en/rfif-components/pll-synthesizersvcos/adf4156/products/EVAL-ADF4156/eb.html|EVAL-ADF4156SD1Z]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-ADF4156SD1Z Evaluation Board with the Xilinx KC705 board. |
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| {{ :resources:fpga:xilinx:interposer:img_adf4156.jpg?400 }} | {{ :resources:fpga:xilinx:interposer:img_adf4156.jpg?400 }} |
