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AD9834 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Evaluation Boards


This document presents the steps to setup an environment for using the EVAL-AD9834SDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-AD9834SDZ Evaluation Board with the Xilinx KC705 board.


For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · AdrianC

Below is presented a picture of SDP-B Controller Board with the EVAL-AD9834SDZ Evaluation Board.

The AD9834 is a 75 MHz, low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9834 an ideal candidate for power-sensitive applications.

The EVAL-AD9834SDZ evaluation board is designed to help customers quickly prototype new AD9834 circuits and reduce design time. A high performance, on-board 75 MHz trimmed general oscillator is available to use as the master clock for the AD9834 system. Various links and SMB connectors are also available on the EVAL-AD9834SDZ board to maximize the usability.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
  • uC-Probe run-time monitoring tool


The following table presents a short description the reference design archive contents.

Folder Description
Bit Contains the KC705 configuration file that can be used to program the system for quick evaluation.
Microblaze Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA.
Software Contains the source files of the software project that will be run by the Microblaze processor.
uCProbeInterface Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microblaze memory.

Run the Demonstration Project

Hardware Setup

Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.

  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  • Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Kintex 7 device (see screenshot below).

  • Program the KC705 FPGA using the “Bit/download.bit” file provided in the reference design archive.
  • Power the ADI evaluation board.

At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.

Configure uC-Probe

Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.

Select uC-Probe options.

  • Click on the uC-Probe icon on the top left portion of the screen.
  • Click on the Options button to open the dialog box.

Set target board communication protocol as RS-232

  • Click on the Communication tab icon on the top left portion of the dialog box
  • Select the RS-232 option.

Setup RS-232 communication settings

  • Select the RS-232 option from the Communication tab.
  • Select the COM port to which the KC705 board is connected.
  • Set the Baud Rate to 115200 bps.

  • Press Apply and OK to exit the options menu.

Load and Run the Demonstration Project

  • Click the Open option from the uC-Probe menu and select the .wsp file from the ucProbeInterface folder provided within the reference design files.
  • Before opening the interface uC-Probe will ask for a symbols file that must be associated with the interface. Select the file ucProbeInterface/ADIEvalBoard.elf to be loaded as a symbol file.
  • Run the demonstration project by pressing the Play button.

  • In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the Stop button and run it again by pressing the Play button.
  • After starting the uC-Probe interface wait until the status of the connection with the board displayed on the bottom of the screen is set to Connected. It is possible to use the interface only after the status is changed to Connected and the data transfer speed displayed next to the connection status is different than 0.
16 Feb 2012 09:23 · acozma

Demonstration Project User Interface

The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-AD9834SDZ evaluation board.

Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.

Section B is used to set or clear the bits and pins which affect the signal from the IOUT output.

Programming Method:

  • HW – selects the control pins to implement the register selection, reset, and DAC power-down functions.
  • SW – selects the control bits to implement the register selection, reset, and DAC power-down functions.

Frequency control:

  • F1 – FREQ1 register is used in the phase accumulator.
  • F0 – FREQ0 register is used in the phase accumulator.

Phase control:

  • P1 – PHASE1 register data is added to the output of the phase accumulator.
  • P0 – PHASE0 register data is added to the output of the phase accumulator.

IOUT Output:

  • Ramp – Triangle signal at the output.
  • Sin – Sinusoidal signal at the output.

HW Pins:

  • F1 / F0 – This pin controls which frequency register, FREQ0 or FREQ1, is used in the phase accumulator.
  • P1 / P0 – This pin controls which phase register, PHASE0 or PHASE1, is added to the phase accumulator output.

Sleep: When this pin is high, the DAC is powered down.

Reset: This pin resets the appropriate internal registers to 0.

Section C is used to load values in the frequency and phase registers. A frequency value is set using the corresponding dial and slider controls. The dial sets the number of the digit to be modified and the slider sets the value of the selected digit. For example in order to set the value of 1234 Hz the following steps have to be performed (not necessarily in the listed order):

  • put the dial to position 0 and move the slider to 4;
  • put the dial to position 1 and move the slider to 3;
  • put the dial to position 2 and move the slider to 2;
  • put the dial to position 3 and move the slider to 1.

Section D is used to set or clear the bits which affect the signal from the SIGN BIT OUT output.

Sign Bit Output Options:

  • Enable / Disable – enables / disables the SIGN BIT OUT pin.
  • Comparator / DAC – connects the on-board comparator / the MSB of the DAC to the SIGN BIT OUT pin.
  • MSB / MSB/2 – Outputs MSB / MSB/2 of the DAC to the SIGN BIT OUT pin.

Section E is used to select the sleep mode of the circuit.

Section F is used to activate and control the Frequency Sweep function.

Sweep ON / Sweep OFF: Turn ON / OFF the sweep function.

Start / Stop: Start / Stop the sweep function.

Start Frequency: Value of the start frequency.

Stop Frequency: Value of the stop frequency.

Step Frequency: Value of the increment size.

Delay: Value of the delay between each frequency increment.


In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues:

  • Check that the evaluation board is powered as instructed in the board's user guide.
  • In uC-Probe refresh the symbols file by right-clicking on the System Browser window and selecting Refresh Symbols.
  • If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.

More information

28 May 2012 15:18
resources/fpga/xilinx/interposer/ad9834.1348831162.txt.gz · Last modified: 28 Sep 2012 13:19 by AdrianC