This is an old revision of the document!
This document presents the steps to setup an environment for using the EVAL-AD9834SDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-AD9834SDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD9834SDZ Evaluation Board.
The AD9834 is a 75 MHz, low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9834 an ideal candidate for power-sensitive applications.
The EVAL-AD9834SDZ evaluation board is designed to help customers quickly prototype new AD9834 circuits and reduce design time. A high performance, on-board 75 MHz trimmed general oscillator is available to use as the master clock for the AD9834 system. Various links and SMB connectors are also available on the EVAL-AD9834SDZ board to maximize the usability.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
The following table presents a short description the reference design archive contents.
|Bit||Contains the KC705 configuration file that can be used to program the system for quick evaluation.|
|Microblaze||Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA.|
|Software||Contains the source files of the software project that will be run by the Microblaze processor.|
|uCProbeInterface||Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microblaze memory.|
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.
Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.
Select uC-Probe options.
Set target board communication protocol as RS-232
Setup RS-232 communication settings
The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-AD9834SDZ evaluation board.
Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.
Section B is used to set or clear the bits and pins which affect the signal from the IOUT output.
Sleep: When this pin is high, the DAC is powered down.
Reset: This pin resets the appropriate internal registers to 0.
Section C is used to load values in the frequency and phase registers. A frequency value is set using the corresponding dial and slider controls. The dial sets the number of the digit to be modified and the slider sets the value of the selected digit. For example in order to set the value of 1234 Hz the following steps have to be performed (not necessarily in the listed order):
Section D is used to set or clear the bits which affect the signal from the SIGN BIT OUT output.
Sign Bit Output Options:
Section E is used to select the sleep mode of the circuit.
Section F is used to activate and control the Frequency Sweep function.
Sweep ON / Sweep OFF: Turn ON / OFF the sweep function.
Start / Stop: Start / Stop the sweep function.
Start Frequency: Value of the start frequency.
Stop Frequency: Value of the stop frequency.
Step Frequency: Value of the increment size.
Delay: Value of the delay between each frequency increment.
In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: