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| resources:fpga:xilinx:interposer:ad9739a [03 Jan 2021 22:12] – fix links Robin Getz | resources:fpga:xilinx:interposer:ad9739a [09 Jan 2021 00:49] – user interwiki links Robin Getz | ||
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| * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | ||
| * A UART terminal (Tera Term/ | * A UART terminal (Tera Term/ | ||
| - | * ADI DPG DAC Software Suite [[https:// | + | * ADI DPG DAC Software Suite [[/ |
| ==== Bit file ==== | ==== Bit file ==== | ||
| Line 105: | Line 105: | ||
| </ | </ | ||
| - | Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[http:// | + | Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[/ |
| <WRAP round help 80%> | <WRAP round help 80%> | ||
| - | * Questions? [[https://ez.analog.com/ | + | * Questions? [[ez>community/ |
| </ | </ | ||
| Line 115: | Line 115: | ||
| ===== Tar file contents ===== | ===== Tar file contents ===== | ||
| - | The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[http://www.xilinx.com/support/ | + | The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[xilinx>support/ |
| | license.txt | ADI license & copyright information. | | | license.txt | ADI license & copyright information. | | ||
resources/fpga/xilinx/interposer/ad9739a.txt · Last modified: 20 Dec 2023 11:50 by Stefan-Robert Raus