The AD9739A is a 14-bit, 2.5GSPS high performance RF digital-to-analog converter (DAC) capable of synthesizing wideband signals from DC up to 3 GHz. This reference design includes a DDS generator that drives both ports of the device. The programming is done via the USB-SPI interface.
The bit file provided combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal, ADI DAC software and the programmer (IMPACT). The notes below refer to ML605, but the procedure is same for all the boards.
To begin make the following connections (see image below):
Setup the clock source to be 2.5GHz. If you wish to run the device at a different clock rate, please change the SDK c program accordingly. After the hardware setup, turn the power on to the ML605 and the AD9739A-EBZ boards.
Start ADI- AD9739A SPI program (see screenshot below)-
Start IMPACT, and initialze the JTAG chain. The program should recognize the Virtex 6 device (see screenshot below). Start a UART terminal (set to 57600 baud rate) and then program the device.
If programming was successful, you should be seeing messages appear on the terminal as shown in figure below.
Now enable the receivers via the ADI- AD9739A SPI program (see screenshot above)-
After DDS is enabled, you should see the spectrum analyzer displaying the 300MHz tone.
The reference design consists of a DDS module and a lvds interface.
The DDS module consists of a Xilinx DDS core and DDR based DDS. Internally the DDS runs at fDAC/3 clock. The output samples are interleaved and driven by the lvds interface.
Refer to the regmap.txt file inside the pcore.
FPGA Referece Designs:
Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See generating Xilinx netlist/verilog files from xco files for details.
The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to Xilinx EDK documentation for details.
|license.txt||ADI license & copyright information.|
|system.xmp||XMP file (use this file to build the reference design).|
|data/||UCF file and/or DDR MIG project files.|
|docs/||Documentation files (Please note that this wiki page is the documentation for the reference design).|
|sw/||Software (Xilinx SDK) & bit file(s).|
|cf_lib/edk/pcores||The pcores directory.|