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resources:fpga:xilinx:interposer:ad9279 [12 Jun 2017 15:04] – [More information] Lars-Peter Clausenresources:fpga:xilinx:interposer:ad9279 [11 May 2021 09:46] (current) – [Required Hardware] Meriam Yuson-Aguila
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 ===== Supported Carriers ===== ===== Supported Carriers =====
  
-  * [[xilinx> ML605]] +  * [[xilinx>ML605]] 
  
  
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   * ML605 board    * ML605 board 
   * AD9279-EBZ board & Power supply   * AD9279-EBZ board & Power supply
 +    *{{ :resources:fpga:xilinx:interposer:ad9279-ebz.pdf |}}- evaluation board schematic
   * ADC FMC interposer board   * ADC FMC interposer board
   * Signal generator (clock, optional)   * Signal generator (clock, optional)
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 </WRAP> </WRAP>
  
-Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[http://wiki.analog.com/resources/eval/user-guides/ad-fmcomms1-ebz/reference_hdl|generating Xilinx netlist/verilog files from xco files]] for details.+Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[/resources/eval/user-guides/ad-fmcomms1-ebz/reference_hdl|generating Xilinx netlist/verilog files from xco files]] for details.
  
 <WRAP round help 80%> <WRAP round help 80%>
-  * Questions? [[http://ez.analog.com/post!input.jspa?containerType=14&container=2061|Ask Help & Support]].+  * Questions? [[ez>fpga|Ask Help & Support]].
 </WRAP> </WRAP>
  
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 ===== Tar file contents ===== ===== Tar file contents =====
  
-The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[http://www.xilinx.com/support/documentation/dt_edk_edk13-2.htm|Xilinx EDK documentation]] for details.+The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[xilinx>support/documentation/dt_edk_edk13-2.htm|Xilinx EDK documentation]] for details.
  
 | license.txt | ADI license & copyright information. | | license.txt | ADI license & copyright information. |
resources/fpga/xilinx/interposer/ad9279.1497272698.txt.gz · Last modified: 12 Jun 2017 15:04 by Lars-Peter Clausen

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