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resources:fpga:xilinx:interposer:ad8403 [28 May 2012 15:52]
Alexandru.Tofan Approved
resources:fpga:xilinx:interposer:ad8403 [09 Oct 2013 16:47]
CsomI Correct typos
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>​AD8403|EVAL-AD8403SDZ]]** evaluation board together with the Xilinx KC705 FPGA boardthe Xilinx Embedded Development Kit (EDK) and the [[http://​micrium.com/​page/​products/​tools/​probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD8403SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>​AD8403|EVAL-AD8403SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD8403SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :​resources:​fpga:​xilinx:​interposer:​img_ad8403.jpg }} {{ :​resources:​fpga:​xilinx:​interposer:​img_ad8403.jpg }}
  
-For component evaluation and performance purposes, as opposed to quick prototyping,​ the user is directed to Analog Devices [[/​resources/​eval/​sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: +{{page>common_sdp}}
-  * a controller board, like the **[[resources/​eval/​sdp/​sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** +
-  * a compatible Analog Devices SDP [[adi>sdp#​exallist|product evaluation board]] +
-  * corresponding PC software +
-The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software. ​ Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.+
  
 Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD8403SDZ** Evaluation Board. Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD8403SDZ** Evaluation Board.
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   * [[adi>/​static/​imported-files/​user_guides/​UG-255.pdf|EVAL-AD8403SDZ evaluation board user guide]]   * [[adi>/​static/​imported-files/​user_guides/​UG-255.pdf|EVAL-AD8403SDZ evaluation board user guide]]
   * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://​www.xilinx.com/​products/​boards-and-kits/​EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://​micrium.com/​page/​products/​tools/​probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack)+  * Xilinx ISE 14.6
-  * [[http://micrium.com/​page/​products/​tools/​probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal),​ baud rate 115200.
  
 ===== Downloads ===== ===== Downloads =====
 +<WRAP round download 80%>
 +\\
 +  * **AD8403 Driver:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_drivers/​AD5172
 +  * **AD8403 Commands:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​device_commands/​AD5172
 +  * **Xilinx Boards Common Drivers:** https://​github.com/​analogdevicesinc/​no-OS/​tree/​master/​platform_drivers/​Xilinx/​SDP_Common
 +  * **EDK KC705 Reference project:** https://​github.com/​analogdevicesinc/​fpgahdl_xilinx/​tree/​master/​cf_sdp_kc705
 +\\
 +</​WRAP>​
  
-  * {{:​resources:​fpga:​xilinx:​interposer:​ad8403_evalboard.zip|Reference Design Files}}+===== Hardware setup =====
  
-The following table presents a short description ​the reference design archive contents.+<WRAP round important 80%> 
 +\\ 
 +Before connecting ​the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</​WRAP>​
  
-**Folder** ^ **Description** ^ +  ​Use the FMC-SDP interposer ​to connect ​the ADI evaluation ​board to the Xilinx ​KC705 board on the FMC LPC connector
-| Bit | Contains ​the KC705 configuration file that can be used to program ​the system for quick evaluation. | +  * Connect ​the JTAG and UART cables ​to the KC705 and power up the FPGA board.
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains ​the uCProbe interface ​and the .elf symbols file used by uC-Probe ​to access data from the Microblaze memory|+
  
-====== Run the Demonstration ​Project ======+===== Reference ​Project ​Overview ​===== 
 +The following commands were implemented in this version of EVAL-AD8403 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **rdac=** | Load the wiper register with a give value. Accepted values:\\ channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register.\\ 2 - select RDAC 3 wiper register.\\ 3 - select RDAC 4 wiper register.\\ value:\\ 0 .. 255 - value to be written in register. | 
 +| **rdac?** | Read back the value of the wiper register. Accepted values:\\ channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register.\\ 2 - select RDAC 3 wiper register.\\ 3 - select RDAC 4 wiper register.| 
 +| **wbuf1?** | Read back the value of the Wiper Buffer in voltage. (VDD=3.2V) | 
 +| **shutdown=** | Shutdown connects wiper to B terminal and open circuits the A terminal. Accepted values:\\ channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register. \\ 2 - select RDAC 3 wiper register.\\ 3 - select RDAC 4 wiper register. | 
 +| **shutdown?​** | Notify about the state of the selected RDAC. Accepted values:\\ channel:\\ 0 - select RDAC 1 wiper register.\\ 1 - select RDAC 2 wiper register.\\ 2 - select RDAC 3 wiper register.\\ 3 - select RDAC 4 wiper register.|
  
-{{page>​ucprobe_common}}+Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Demonstration Project User Interface =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :​resources:​fpga:​xilinx:​interposer:​Terminal_KC705.jpg?​ }}
  
- +===== Software Project Setup ===== 
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD8403SDZ** evaluation board. +{{page>​import_workspace}}
- +
-{{ :​resources:​fpga:​altera:​bemicro:​ad8403interface.png?​700 }} +
- +
-**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//​ON/​OFF//​** switch. The **//​Activity//​** LED turns green when the communication is active. If the **//​ON/​OFF//​** switch is set to **//ON//** and the **//​Activity//​** LED is **//​BLACK//​** it means that there is a communication problem with the board. +
- +
-**Section B** is used to shutdown and reset the device. +
-  * **Shutdown**:​ When it is pressed, forces the resistors to an end-to-end open-circuit condition on the A terminal and shorts the wiper to the B terminal, achieving a microwatt power shutdown state. When it is released, the previous latch settings put the wiper in the same resistance setting prior to shutdown. +
-  * **Reset**: ​ When it is pressed, forces the wiper to midscale by loading 80H into the VR latch. When it is released, the VR latch remains loaded with 80H, but you can load the desired values. +
- +
-**Section C** is used to send a 10-bits word to the device. This data-word can be sent by manually switching the buttons from 0 to 1 or from 1 to 0, as desired, and then toggling the **//Send Data//** switch. +
- +
-**Section D** is used to update the RDAC registers by selecting a desirable value on the slider and toggling the **//Load RDACx//** switch. +
- +
-===== Troubleshooting ​===== +
- +
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +
-  * Check that the evaluation board is powered as instructed in the board'​s user guide. +
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//​**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
   * [[resources:​tools-software:​linux-drivers:​misc:​dpot|AD8403 Digital Potentiometer Linux Driver]]   * [[resources:​tools-software:​linux-drivers:​misc:​dpot|AD8403 Digital Potentiometer Linux Driver]]
 {{page>​ez_common}} {{page>​ez_common}}
resources/fpga/xilinx/interposer/ad8403.txt · Last modified: 09 Oct 2013 16:47 by CsomI