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resources:fpga:xilinx:interposer:ad7988-5 [13 Mar 2012 13:35] – Approved Andrei Cozmaresources:fpga:xilinx:interposer:ad7988-5 [14 Jan 2021 06:09] (current) – use xilinx> interwiki links Robin Getz
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 {{ :resources:fpga:xilinx:interposer:ad7980.jpg?400 | EVAL-AD7988-5SDZ and Xilinx KC705 board}} {{ :resources:fpga:xilinx:interposer:ad7980.jpg?400 | EVAL-AD7988-5SDZ and Xilinx KC705 board}}
  
-For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: +{{page>common_sdp}}
-  * a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** +
-  * a compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] +
-  * corresponding PC software +
-The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software.  Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.+
  
 Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD7988-5SDZ** Evaluation Board. Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD7988-5SDZ** Evaluation Board.
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 {{ :resources:fpga:xilinx:interposer:ad7980_sdp.jpg?400 | SDP-B Controller Board and EVAL-AD7988-5SDZ }} {{ :resources:fpga:xilinx:interposer:ad7980_sdp.jpg?400 | SDP-B Controller Board and EVAL-AD7988-5SDZ }}
  
-The [[adi>AD7988-5]] is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operate from a single power supply, VDD. The AD7988-5 offers a 500kSPS throughput. It is a low power, 16-bit sampling ADC with a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD.+The [[adi>AD7988-1]]/[[adi>AD7988-5]] are 16-bit, successive approximation, analog-to-digital converters (ADC) that operate from a single power supply, VDD. The AD7988-1 offers a 100 kSPS throughput, and the AD7988-5 offers a 500 kSPS throughput. They are low power, 16-bit sampling ADCs with a versatile serial interface port. On the CNV rising edge, they sample an analog input, IN+, between 0 V to VREF with respect to a ground sense, IN−. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. The SPI-compatible serial interface also features the ability to daisy-chain several ADCs on a single 3-wire bus using the SDI input. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic using the separate supply, VIO. The AD7988-1/AD7988-5 generics are housed in a 10-lead MSOP or a 10-lead LFCSP (QFN) with operation specified from −40°C to +125°C.
  
 The EVAL-AD7988-5SDZ evaluation board is a member of a growing number of boards available for the SDP. It was designed to help customers evaluate performance or quickly prototype new AD7988-5 circuits and reduce design time. When using this evaluation board with the SDP board or Xilinx KC705 board, apply +7.5V as +Vs, a voltage between -2V and -5V as -Vs and +2.5V as VDD. The EVAL-AD7988-5SDZ evaluation board is a member of a growing number of boards available for the SDP. It was designed to help customers evaluate performance or quickly prototype new AD7988-5 circuits and reduce design time. When using this evaluation board with the SDP board or Xilinx KC705 board, apply +7.5V as +Vs, a voltage between -2V and -5V as -Vs and +2.5V as VDD.
- 
 ===== More information ===== ===== More information =====
   * [[adi>AD7988-5|AD7988-5 Product Info]] - pricing, samples, datasheet   * [[adi>AD7988-5|AD7988-5 Product Info]] - pricing, samples, datasheet
   * {{:resources:fpga:altera:bemicro:user_guide_eval_10lead_pulsar.pdf|EVAL-AD7988-5SDZ evaluation board user guide}}   * {{:resources:fpga:altera:bemicro:user_guide_eval_10lead_pulsar.pdf|EVAL-AD7988-5SDZ evaluation board user guide}}
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Hardware ===== ===== Required Hardware =====
  
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
   * **EVAL-AD7988-5SDZ** evaluation board   * **EVAL-AD7988-5SDZ** evaluation board
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 ===== Hardware Setup ===== ===== Hardware Setup =====
  
-<note important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</note>+<WRAP important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</WRAP>
  
   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
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 {{ :resources:fpga:xilinx:interposer:teraterm_adc.png?400 }} {{ :resources:fpga:xilinx:interposer:teraterm_adc.png?400 }}
  
-<note tip>The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn't appear anymore.</note>+<WRAP tip>The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn't appear anymore.</WRAP>
  
 ====== More information ====== ====== More information ======
-  * [[ez>community/fpga|ask questions about the FPGA reference design]]+{{page>ez_common}}
resources/fpga/xilinx/interposer/ad7988-5.1331642106.txt.gz · Last modified: 13 Mar 2012 13:35 by Andrei Cozma

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