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resources:fpga:xilinx:interposer:ad7490 [19 Dec 2012 15:05] – created Adrian Costinaresources:fpga:xilinx:interposer:ad7490 [15 Nov 2018 08:47] – [Required Hardware] 祥祥 任
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 ===== Hardware Setup ===== ===== Hardware Setup =====
  
-<note important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</note>+<WRAP important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</WRAP>
  
   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
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 If the resulting csv file is opened with Microsoft Excel, the data will be displayed on a different number of columns, each column corresponding to a channel. If the resulting csv file is opened with Microsoft Excel, the data will be displayed on a different number of columns, each column corresponding to a channel.
  
-<note tip>The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn't appear anymore.</note>+<WRAP tip>The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn't appear anymore.</WRAP>
  
 ====== More information ====== ====== More information ======
 {{page>ez_common}} {{page>ez_common}}
  
resources/fpga/xilinx/interposer/ad7490.txt · Last modified: 09 Jan 2021 00:49 by Robin Getz

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